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  /external/llvm/test/CodeGen/ARM/
integer_insertelement.ll 4 ; the vector is not spuriously copied. "vorr dX, dY, dY" is the way of moving
8 ; CHECK-NOT: vorr d
10 ; CHECK-NOT: vorr d
18 ; CHECK-NOT: vorr d
20 ; CHECK-NOT: vorr d
28 ; CHECK-NOT: vorr d
30 ; CHECK-NOT: vorr d
widen-vmovs.ll 8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
9 ; CHECK: vorr [[DL:d[0-9]+]], [[DN:d[0-9]+]]
18 ; - The execution domain switch to vorr works across basic blocks.
vfcmp.ll 87 ; ueq is implemented with VCGT/VCGT/VORR/VMVN
92 ;CHECK-NEXT: vorr
101 ; one is implemented with VCGT/VCGT/VORR
106 ;CHECK-NEXT: vorr
114 ; uno is implemented with VCGT/VCGE/VORR/VMVN
119 ;CHECK-NEXT: vorr
128 ; ord is implemented with VCGT/VCGE/VORR
133 ;CHECK-NEXT: vorr
vbits.ll 293 ;CHECK: vorr
302 ;CHECK: vorr
311 ;CHECK: vorr
320 ;CHECK: vorr
329 ;CHECK: vorr
338 ;CHECK: vorr
347 ;CHECK: vorr
356 ;CHECK: vorr
513 ; CHECK: vorr
523 ; CHECK: vorr
    [all...]
2009-11-01-NeonMoves.ll 22 ;CHECK: vorr
coalesce-subregs.ll 11 ; CHECK-NOT: vorr
reg_sequence.ll 127 ; CHECK: vorr {{q[0-9]+}}, {{q[0-9]+}}
142 ; CHECK: vorr {{q[0-9]+}}, {{q[0-9]+}}, {{q[0-9]+}}
159 ; CHECK: vorr d[[D0:[0-9]+]], d[[D1:[0-9]+]]
175 ; CHECK: vorr q[[Q0:[0-9]+]], q[[Q1:[0-9]+]], q[[Q1:[0-9]+]]
  /external/llvm/test/MC/ARM/
neon-bitwise-encoding.s 15 vorr d16, d17, d16
16 vorr q8, q8, q9
18 @ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xf2]
19 @ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xf2]
21 vorr.i32 d16, #0x1000000
22 vorr.i32 q8, #0x1000000
23 vorr.i32 q8, #0x0
25 @ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
26 @ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
27 @ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2
    [all...]
neont2-bitwise-encoding.s 18 vorr d16, d17, d16
19 vorr q8, q8, q9
20 @ vorr.i32 d16, #0x1000000
21 @ vorr.i32 q8, #0x1000000
22 @ vorr.i32 q8, #0x0
24 @ CHECK: vorr d16, d17, d16 @ encoding: [0x61,0xef,0xb0,0x01]
25 @ CHECK: vorr q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x01]
  /external/openssl/crypto/sha/asm/
sha512-armv4.s 478 vorr d30,d16,d18
483 vorr d30,d29 @ Maj(a,b,c)
515 vorr d30,d23,d17
520 vorr d30,d29 @ Maj(a,b,c)
552 vorr d30,d22,d16
557 vorr d30,d29 @ Maj(a,b,c)
589 vorr d30,d21,d23
594 vorr d30,d29 @ Maj(a,b,c)
626 vorr d30,d20,d22
631 vorr d30,d29 @ Maj(a,b,c
    [all...]
sha512-armv4.pl 485 vorr $Maj,$a,$c
490 vorr $Maj,$Ch @ Maj(a,b,c)
  /external/llvm/test/CodeGen/Thumb2/
inflate-regs.ll 13 ; CHECK: vorr
32 ; CHECK: vorr
  /external/libvpx/vp8/encoder/arm/neon/
fastquantizeb_neon.asm 41 vorr.s16 q6, q10, q11
42 vorr.s16 d12, d12, d13
  /external/llvm/test/MC/Disassembler/ARM/
neon-tests.txt 30 # CHECK: vorr d0, d15, d15
72 # CHECK: vorr.i32 q15, #0x4f0000
neont2.txt 289 # CHECK: vorr d16, d17, d16
291 # CHECK: vorr q8, q8, q9
293 # CHECK: vorr.i32 d16, #0x1000000
295 # CHECK: vorr.i32 q8, #0x1000000
297 # CHECK: vorr.i32 q8, #0x0
    [all...]
  /external/libvpx/vpx_ports/
arm_cpudetect.c 87 /*VORR q0,q0,q0*/
  /external/openssl/crypto/
armv4cpuid.S 10 .word 0xf26ee1fe @ vorr q15,q15,q15
  /external/clang/include/clang/Basic/
arm_neon.td 378 def VORR : Inst<"vorr", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_OR>;
  /external/libvpx/vp8/common/arm/neon/
loopfilter_neon.asm 359 vorr q14, q13, q14 ; vp8_hevmask
mbloopfilter_neon.asm 420 vorr q14, q13, q14 ; vp8_hevmask
  /external/openssl/crypto/modes/asm/
ghash-armv4.s 394 vorr q10,q1 @ Z=Z:Zo<<1
  /hardware/samsung_slsi/exynos5/libswconverter/
csc_ARGB8888_to_YUV420SP_NEON.s 48 vorr.u16 q10, #0x0080
  /external/valgrind/main/none/tests/arm/
neon128.c 380 printf("----- VORR (immediate) -----\n");
381 TESTINSN_imm("vorr.i32 q0", q0, 0x7);
382 TESTINSN_imm("vorr.i16 q2", q2, 0x7);
383 TESTINSN_imm("vorr.i32 q8", q8, 0x700);
384 TESTINSN_imm("vorr.i16 q6", q6, 0x700);
385 TESTINSN_imm("vorr.i32 q14", q14, 0x70000);
386 TESTINSN_imm("vorr.i32 q15", q15, 0x7000000);
449 printf("---- VORR ----\n");
450 TESTINSN_bin("vorr q0, q1, q2", q0, q1, i8, 0x24, q2, i16, 0x73);
451 TESTINSN_bin("vorr q7, q3, q0", q7, q3, i8, 0x24, q0, i16, 0xff)
    [all...]
neon64.stdout.exp 47 ----- VORR (immediate) -----
48 vorr.i32 d0, #0x7 :: Qd 0x55555557 0x55555557
49 vorr.i32 d0, #0x7 :: Qd 0x131b1a1f 0x121f1e1f
50 vorr.i16 d2, #0x7 :: Qd 0x55575557 0x55575557
51 vorr.i16 d2, #0x7 :: Qd 0x131f1a1f 0x121f1e1f
52 vorr.i32 d8, #0x700 :: Qd 0x55555755 0x55555755
53 vorr.i32 d8, #0x700 :: Qd 0x131b1f1b 0x121f1f1f
54 vorr.i16 d6, #0x700 :: Qd 0x57555755 0x57555755
55 vorr.i16 d6, #0x700 :: Qd 0x171b1f1b 0x171f1f1f
56 vorr.i32 d14, #0x70000 :: Qd 0x55575555 0x5557555
    [all...]
neon128.stdout.exp 47 ----- VORR (immediate) -----
48 vorr.i32 q0, #0x7 :: Qd 0x55555557 0x55555557 0x55555557 0x55555557
49 vorr.i32 q0, #0x7 :: Qd 0x151d191f 0x141c1f1f 0x131b1a1f 0x121f1e1f
50 vorr.i16 q2, #0x7 :: Qd 0x55575557 0x55575557 0x55575557 0x55575557
51 vorr.i16 q2, #0x7 :: Qd 0x151f191f 0x141f1f1f 0x131f1a1f 0x121f1e1f
52 vorr.i32 q8, #0x700 :: Qd 0x55555755 0x55555755 0x55555755 0x55555755
53 vorr.i32 q8, #0x700 :: Qd 0x151d1f1d 0x141c1f1c 0x131b1f1b 0x121f1f1f
54 vorr.i16 q6, #0x700 :: Qd 0x57555755 0x57555755 0x57555755 0x57555755
55 vorr.i16 q6, #0x700 :: Qd 0x171d1f1d 0x171c1f1c 0x171b1f1b 0x171f1f1f
56 vorr.i32 q14, #0x70000 :: Qd 0x55575555 0x55575555 0x55575555 0x5557555
    [all...]

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