1 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=i686-apple-darwin9 | FileCheck %s 2 3 int atomic(void) { 4 // non-sensical test for sync functions 5 int old; 6 int val = 1; 7 char valc = 1; 8 _Bool valb = 0; 9 unsigned int uval = 1; 10 int cmp = 0; 11 int* ptrval; 12 13 old = __sync_fetch_and_add(&val, 1); 14 // CHECK: atomicrmw add i32* %val, i32 1 seq_cst 15 16 old = __sync_fetch_and_sub(&valc, 2); 17 // CHECK: atomicrmw sub i8* %valc, i8 2 seq_cst 18 19 old = __sync_fetch_and_min(&val, 3); 20 // CHECK: atomicrmw min i32* %val, i32 3 seq_cst 21 22 old = __sync_fetch_and_max(&val, 4); 23 // CHECK: atomicrmw max i32* %val, i32 4 seq_cst 24 25 old = __sync_fetch_and_umin(&uval, 5u); 26 // CHECK: atomicrmw umin i32* %uval, i32 5 seq_cst 27 28 old = __sync_fetch_and_umax(&uval, 6u); 29 // CHECK: atomicrmw umax i32* %uval, i32 6 seq_cst 30 31 old = __sync_lock_test_and_set(&val, 7); 32 // CHECK: atomicrmw xchg i32* %val, i32 7 seq_cst 33 34 old = __sync_swap(&val, 8); 35 // CHECK: atomicrmw xchg i32* %val, i32 8 seq_cst 36 37 old = __sync_val_compare_and_swap(&val, 4, 1976); 38 // CHECK: cmpxchg i32* %val, i32 4, i32 1976 seq_cst 39 40 old = __sync_bool_compare_and_swap(&val, 4, 1976); 41 // CHECK: cmpxchg i32* %val, i32 4, i32 1976 seq_cst 42 43 old = __sync_fetch_and_and(&val, 0x9); 44 // CHECK: atomicrmw and i32* %val, i32 9 seq_cst 45 46 old = __sync_fetch_and_or(&val, 0xa); 47 // CHECK: atomicrmw or i32* %val, i32 10 seq_cst 48 49 old = __sync_fetch_and_xor(&val, 0xb); 50 // CHECK: atomicrmw xor i32* %val, i32 11 seq_cst 51 52 old = __sync_add_and_fetch(&val, 1); 53 // CHECK: atomicrmw add i32* %val, i32 1 seq_cst 54 55 old = __sync_sub_and_fetch(&val, 2); 56 // CHECK: atomicrmw sub i32* %val, i32 2 seq_cst 57 58 old = __sync_and_and_fetch(&valc, 3); 59 // CHECK: atomicrmw and i8* %valc, i8 3 seq_cst 60 61 old = __sync_or_and_fetch(&valc, 4); 62 // CHECK: atomicrmw or i8* %valc, i8 4 seq_cst 63 64 old = __sync_xor_and_fetch(&valc, 5); 65 // CHECK: atomicrmw xor i8* %valc, i8 5 seq_cst 66 67 __sync_val_compare_and_swap((void **)0, (void *)0, (void *)0); 68 // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst 69 70 if ( __sync_val_compare_and_swap(&valb, 0, 1)) { 71 // CHECK: cmpxchg i8* %valb, i8 0, i8 1 seq_cst 72 old = 42; 73 } 74 75 __sync_bool_compare_and_swap((void **)0, (void *)0, (void *)0); 76 // CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst 77 78 __sync_lock_release(&val); 79 // CHECK: store atomic i32 0, {{.*}} release, align 4 80 81 __sync_lock_release(&ptrval); 82 // CHECK: store atomic i32 0, {{.*}} release, align 4 83 84 __sync_synchronize (); 85 // CHECK: fence seq_cst 86 87 return old; 88 } 89 90 // CHECK: @release_return 91 void release_return(int *lock) { 92 // Ensure this is actually returning void all the way through. 93 return __sync_lock_release(lock); 94 // CHECK: store atomic {{.*}} release, align 4 95 } 96 97 98 // rdar://8461279 - Atomics with address spaces. 99 // CHECK: @addrspace 100 void addrspace(int __attribute__((address_space(256))) * P) { 101 __sync_bool_compare_and_swap(P, 0, 1); 102 // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst 103 104 __sync_val_compare_and_swap(P, 0, 1); 105 // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst 106 107 __sync_xor_and_fetch(P, 123); 108 // CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst 109 } 110
