1 /************************************************************************** 2 Etherboot - BOOTP/TFTP Bootstrap Program 3 TLAN driver for Etherboot 4 ***************************************************************************/ 5 6 /* 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2, or (at 10 * your option) any later version. 11 */ 12 13 /* to get some global routines like printf */ 14 #include "etherboot.h" 15 /* to get the interface to the body of the program */ 16 #include "nic.h" 17 /* to get the PCI support functions, if this is a PCI NIC */ 18 #include "pci.h" 19 /* to get our own prototype */ 20 #include "cards.h" 21 22 /***************************************************************** 23 * TLan Definitions 24 * 25 ****************************************************************/ 26 27 #define TLAN_MIN_FRAME_SIZE 64 28 #define TLAN_MAX_FRAME_SIZE 1600 29 30 #define TLAN_NUM_RX_LISTS 32 31 #define TLAN_NUM_TX_LISTS 64 32 33 #define TLAN_IGNORE 0 34 #define TLAN_RECORD 1 35 36 #define TLAN_DBG(lvl, format, args...) if (debug&lvl) printf("TLAN: " format, ##args ); 37 #define TLAN_DEBUG_GNRL 0x0001 38 #define TLAN_DEBUG_TX 0x0002 39 #define TLAN_DEBUG_RX 0x0004 40 #define TLAN_DEBUG_LIST 0x0008 41 #define TLAN_DEBUG_PROBE 0x0010 42 43 #define MAX_TLAN_BOARDS 8 /* Max number of boards installed at a time */ 44 45 /***************************************************************** 46 * Device Identification Definitions 47 * 48 ****************************************************************/ 49 50 #define PCI_DEVICE_ID_NETELLIGENT_10_T2 0xB012 51 #define PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100 0xB030 52 #ifndef PCI_DEVICE_ID_OLICOM_OC2183 53 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 54 #endif 55 #ifndef PCI_DEVICE_ID_OLICOM_OC2325 56 #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 57 #endif 58 #ifndef PCI_DEVICE_ID_OLICOM_OC2326 59 #define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 60 #endif 61 #define TLAN_ADAPTER_NONE 0x00000000 62 #define TLAN_ADAPTER_UNMANAGED_PHY 0x00000001 63 #define TLAN_ADAPTER_BIT_RATE_PHY 0x00000002 64 #define TLAN_ADAPTER_USE_INTERN_10 0x00000004 65 #define TLAN_ADAPTER_ACTIVITY_LED 0x00000008 66 #define TLAN_SPEED_DEFAULT 0 67 #define TLAN_SPEED_10 10 68 #define TLAN_SPEED_100 100 69 #define TLAN_DUPLEX_DEFAULT 0 70 #define TLAN_DUPLEX_HALF 1 71 #define TLAN_DUPLEX_FULL 2 72 #define TLAN_BUFFERS_PER_LIST 10 73 #define TLAN_LAST_BUFFER 0x80000000 74 #define TLAN_CSTAT_UNUSED 0x8000 75 #define TLAN_CSTAT_FRM_CMP 0x4000 76 #define TLAN_CSTAT_READY 0x3000 77 #define TLAN_CSTAT_EOC 0x0800 78 #define TLAN_CSTAT_RX_ERROR 0x0400 79 #define TLAN_CSTAT_PASS_CRC 0x0200 80 #define TLAN_CSTAT_DP_PR 0x0100 81 82 /***************************************************************** 83 * PHY definitions 84 * 85 ****************************************************************/ 86 87 #define TLAN_PHY_MAX_ADDR 0x1F 88 #define TLAN_PHY_NONE 0x20 89 90 /***************************************************************** 91 * TLan Driver Timer Definitions 92 * 93 ****************************************************************/ 94 95 #define TLAN_TIMER_LINK_BEAT 1 96 #define TLAN_TIMER_ACTIVITY 2 97 #define TLAN_TIMER_PHY_PDOWN 3 98 #define TLAN_TIMER_PHY_PUP 4 99 #define TLAN_TIMER_PHY_RESET 5 100 #define TLAN_TIMER_PHY_START_LINK 6 101 #define TLAN_TIMER_PHY_FINISH_AN 7 102 #define TLAN_TIMER_FINISH_RESET 8 103 #define TLAN_TIMER_ACT_DELAY (HZ/10) 104 105 /***************************************************************** 106 * TLan Driver Eeprom Definitions 107 * 108 ****************************************************************/ 109 110 #define TLAN_EEPROM_ACK 0 111 #define TLAN_EEPROM_STOP 1 112 113 /***************************************************************** 114 * Host Register Offsets and Contents 115 * 116 ****************************************************************/ 117 118 #define TLAN_HOST_CMD 0x00 119 #define TLAN_HC_GO 0x80000000 120 #define TLAN_HC_STOP 0x40000000 121 #define TLAN_HC_ACK 0x20000000 122 #define TLAN_HC_CS_MASK 0x1FE00000 123 #define TLAN_HC_EOC 0x00100000 124 #define TLAN_HC_RT 0x00080000 125 #define TLAN_HC_NES 0x00040000 126 #define TLAN_HC_AD_RST 0x00008000 127 #define TLAN_HC_LD_TMR 0x00004000 128 #define TLAN_HC_LD_THR 0x00002000 129 #define TLAN_HC_REQ_INT 0x00001000 130 #define TLAN_HC_INT_OFF 0x00000800 131 #define TLAN_HC_INT_ON 0x00000400 132 #define TLAN_HC_AC_MASK 0x000000FF 133 #define TLAN_CH_PARM 0x04 134 #define TLAN_DIO_ADR 0x08 135 #define TLAN_DA_ADR_INC 0x8000 136 #define TLAN_DA_RAM_ADR 0x4000 137 #define TLAN_HOST_INT 0x0A 138 #define TLAN_HI_IV_MASK 0x1FE0 139 #define TLAN_HI_IT_MASK 0x001C 140 #define TLAN_DIO_DATA 0x0C 141 142 /* ThunderLAN Internal Register DIO Offsets */ 143 144 #define TLAN_NET_CMD 0x00 145 #define TLAN_NET_CMD_NRESET 0x80 146 #define TLAN_NET_CMD_NWRAP 0x40 147 #define TLAN_NET_CMD_CSF 0x20 148 #define TLAN_NET_CMD_CAF 0x10 149 #define TLAN_NET_CMD_NOBRX 0x08 150 #define TLAN_NET_CMD_DUPLEX 0x04 151 #define TLAN_NET_CMD_TRFRAM 0x02 152 #define TLAN_NET_CMD_TXPACE 0x01 153 #define TLAN_NET_SIO 0x01 154 #define TLAN_NET_SIO_MINTEN 0x80 155 #define TLAN_NET_SIO_ECLOK 0x40 156 #define TLAN_NET_SIO_ETXEN 0x20 157 #define TLAN_NET_SIO_EDATA 0x10 158 #define TLAN_NET_SIO_NMRST 0x08 159 #define TLAN_NET_SIO_MCLK 0x04 160 #define TLAN_NET_SIO_MTXEN 0x02 161 #define TLAN_NET_SIO_MDATA 0x01 162 #define TLAN_NET_STS 0x02 163 #define TLAN_NET_STS_MIRQ 0x80 164 #define TLAN_NET_STS_HBEAT 0x40 165 #define TLAN_NET_STS_TXSTOP 0x20 166 #define TLAN_NET_STS_RXSTOP 0x10 167 #define TLAN_NET_STS_RSRVD 0x0F 168 #define TLAN_NET_MASK 0x03 169 #define TLAN_NET_MASK_MASK7 0x80 170 #define TLAN_NET_MASK_MASK6 0x40 171 #define TLAN_NET_MASK_MASK5 0x20 172 #define TLAN_NET_MASK_MASK4 0x10 173 #define TLAN_NET_MASK_RSRVD 0x0F 174 #define TLAN_NET_CONFIG 0x04 175 #define TLAN_NET_CFG_RCLK 0x8000 176 #define TLAN_NET_CFG_TCLK 0x4000 177 #define TLAN_NET_CFG_BIT 0x2000 178 #define TLAN_NET_CFG_RXCRC 0x1000 179 #define TLAN_NET_CFG_PEF 0x0800 180 #define TLAN_NET_CFG_1FRAG 0x0400 181 #define TLAN_NET_CFG_1CHAN 0x0200 182 #define TLAN_NET_CFG_MTEST 0x0100 183 #define TLAN_NET_CFG_PHY_EN 0x0080 184 #define TLAN_NET_CFG_MSMASK 0x007F 185 #define TLAN_MAN_TEST 0x06 186 #define TLAN_DEF_VENDOR_ID 0x08 187 #define TLAN_DEF_DEVICE_ID 0x0A 188 #define TLAN_DEF_REVISION 0x0C 189 #define TLAN_DEF_SUBCLASS 0x0D 190 #define TLAN_DEF_MIN_LAT 0x0E 191 #define TLAN_DEF_MAX_LAT 0x0F 192 #define TLAN_AREG_0 0x10 193 #define TLAN_AREG_1 0x16 194 #define TLAN_AREG_2 0x1C 195 #define TLAN_AREG_3 0x22 196 #define TLAN_HASH_1 0x28 197 #define TLAN_HASH_2 0x2C 198 #define TLAN_GOOD_TX_FRMS 0x30 199 #define TLAN_TX_UNDERUNS 0x33 200 #define TLAN_GOOD_RX_FRMS 0x34 201 #define TLAN_RX_OVERRUNS 0x37 202 #define TLAN_DEFERRED_TX 0x38 203 #define TLAN_CRC_ERRORS 0x3A 204 #define TLAN_CODE_ERRORS 0x3B 205 #define TLAN_MULTICOL_FRMS 0x3C 206 #define TLAN_SINGLECOL_FRMS 0x3E 207 #define TLAN_EXCESSCOL_FRMS 0x40 208 #define TLAN_LATE_COLS 0x41 209 #define TLAN_CARRIER_LOSS 0x42 210 #define TLAN_ACOMMIT 0x43 211 #define TLAN_LED_REG 0x44 212 #define TLAN_LED_ACT 0x10 213 #define TLAN_LED_LINK 0x01 214 #define TLAN_BSIZE_REG 0x45 215 #define TLAN_MAX_RX 0x46 216 #define TLAN_INT_DIS 0x48 217 #define TLAN_ID_TX_EOC 0x04 218 #define TLAN_ID_RX_EOF 0x02 219 #define TLAN_ID_RX_EOC 0x01 220 221 /* ThunderLAN Interrupt Codes */ 222 223 #define TLAN_INT_NUMBER_OF_INTS 8 224 225 #define TLAN_INT_NONE 0x0000 226 #define TLAN_INT_TX_EOF 0x0001 227 #define TLAN_INT_STAT_OVERFLOW 0x0002 228 #define TLAN_INT_RX_EOF 0x0003 229 #define TLAN_INT_DUMMY 0x0004 230 #define TLAN_INT_TX_EOC 0x0005 231 #define TLAN_INT_STATUS_CHECK 0x0006 232 #define TLAN_INT_RX_EOC 0x0007 233 #define TLAN_TLPHY_ID 0x10 234 #define TLAN_TLPHY_CTL 0x11 235 #define TLAN_TC_IGLINK 0x8000 236 #define TLAN_TC_SWAPOL 0x4000 237 #define TLAN_TC_AUISEL 0x2000 238 #define TLAN_TC_SQEEN 0x1000 239 #define TLAN_TC_MTEST 0x0800 240 #define TLAN_TC_RESERVED 0x07F8 241 #define TLAN_TC_NFEW 0x0004 242 #define TLAN_TC_INTEN 0x0002 243 #define TLAN_TC_TINT 0x0001 244 #define TLAN_TLPHY_STS 0x12 245 #define TLAN_TS_MINT 0x8000 246 #define TLAN_TS_PHOK 0x4000 247 #define TLAN_TS_POLOK 0x2000 248 #define TLAN_TS_TPENERGY 0x1000 249 #define TLAN_TS_RESERVED 0x0FFF 250 #define TLAN_TLPHY_PAR 0x19 251 #define TLAN_PHY_CIM_STAT 0x0020 252 #define TLAN_PHY_SPEED_100 0x0040 253 #define TLAN_PHY_DUPLEX_FULL 0x0080 254 #define TLAN_PHY_AN_EN_STAT 0x0400 255 256 257 /* ThunderLAN MII Registers */ 258 259 /* Generic MII/PHY Registers */ 260 261 #define MII_GEN_CTL 0x00 262 #define MII_GC_RESET 0x8000 263 #define MII_GC_LOOPBK 0x4000 264 #define MII_GC_SPEEDSEL 0x2000 265 #define MII_GC_AUTOENB 0x1000 266 #define MII_GC_PDOWN 0x0800 267 #define MII_GC_ISOLATE 0x0400 268 #define MII_GC_AUTORSRT 0x0200 269 #define MII_GC_DUPLEX 0x0100 270 #define MII_GC_COLTEST 0x0080 271 #define MII_GC_RESERVED 0x007F 272 #define MII_GEN_STS 0x01 273 #define MII_GS_100BT4 0x8000 274 #define MII_GS_100BTXFD 0x4000 275 #define MII_GS_100BTXHD 0x2000 276 #define MII_GS_10BTFD 0x1000 277 #define MII_GS_10BTHD 0x0800 278 #define MII_GS_RESERVED 0x07C0 279 #define MII_GS_AUTOCMPLT 0x0020 280 #define MII_GS_RFLT 0x0010 281 #define MII_GS_AUTONEG 0x0008 282 #define MII_GS_LINK 0x0004 283 #define MII_GS_JABBER 0x0002 284 #define MII_GS_EXTCAP 0x0001 285 #define MII_GEN_ID_HI 0x02 286 #define MII_GEN_ID_LO 0x03 287 #define MII_GIL_OUI 0xFC00 288 #define MII_GIL_MODEL 0x03F0 289 #define MII_GIL_REVISION 0x000F 290 #define MII_AN_ADV 0x04 291 #define MII_AN_LPA 0x05 292 #define MII_AN_EXP 0x06 293 294 /* ThunderLAN Specific MII/PHY Registers */ 295 296 #define TLAN_TC_IGLINK 0x8000 297 #define TLAN_TC_SWAPOL 0x4000 298 #define TLAN_TC_AUISEL 0x2000 299 #define TLAN_TC_SQEEN 0x1000 300 #define TLAN_TC_MTEST 0x0800 301 #define TLAN_TC_RESERVED 0x07F8 302 #define TLAN_TC_NFEW 0x0004 303 #define TLAN_TC_INTEN 0x0002 304 #define TLAN_TC_TINT 0x0001 305 #define TLAN_TS_MINT 0x8000 306 #define TLAN_TS_PHOK 0x4000 307 #define TLAN_TS_POLOK 0x2000 308 #define TLAN_TS_TPENERGY 0x1000 309 #define TLAN_TS_RESERVED 0x0FFF 310 #define TLAN_PHY_CIM_STAT 0x0020 311 #define TLAN_PHY_SPEED_100 0x0040 312 #define TLAN_PHY_DUPLEX_FULL 0x0080 313 #define TLAN_PHY_AN_EN_STAT 0x0400 314 315 /* National Sem. & Level1 PHY id's */ 316 #define NAT_SEM_ID1 0x2000 317 #define NAT_SEM_ID2 0x5C01 318 #define LEVEL1_ID1 0x7810 319 #define LEVEL1_ID2 0x0000 320 321 #define TLan_ClearBit( bit, port ) outb_p(inb_p(port) & ~bit, port) 322 #define TLan_GetBit( bit, port ) ((int) (inb_p(port) & bit)) 323 #define TLan_SetBit( bit, port ) outb_p(inb_p(port) | bit, port) 324 325 typedef unsigned int u32; 326 typedef unsigned short u16; 327 typedef unsigned char u8; 328 329 /* Routines to access internal registers. */ 330 331 inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr) 332 { 333 outw(internal_addr, base_addr + TLAN_DIO_ADR); 334 return (inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3))); 335 336 } /* TLan_DioRead8 */ 337 338 inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr) 339 { 340 outw(internal_addr, base_addr + TLAN_DIO_ADR); 341 return (inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2))); 342 343 } /* TLan_DioRead16 */ 344 345 inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr) 346 { 347 outw(internal_addr, base_addr + TLAN_DIO_ADR); 348 return (inl(base_addr + TLAN_DIO_DATA)); 349 350 } /* TLan_DioRead32 */ 351 352 inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data) 353 { 354 outw(internal_addr, base_addr + TLAN_DIO_ADR); 355 outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3)); 356 357 } 358 359 inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data) 360 { 361 outw(internal_addr, base_addr + TLAN_DIO_ADR); 362 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); 363 364 } 365 366 inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data) 367 { 368 outw(internal_addr, base_addr + TLAN_DIO_ADR); 369 outl(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); 370 371 } 372 373 /* NIC specific static variables go here */ 374 375 /***************************************************************************** 376 ****************************************************************************** 377 378 ThunderLAN Driver Eeprom routines 379 380 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A 381 EEPROM. These functions are based on information in Microchip's 382 data sheet. I don't know how well this functions will work with 383 other EEPROMs. 384 385 ****************************************************************************** 386 *****************************************************************************/ 387 388 /*************************************************************** 389 * TLan_EeSendStart 390 * 391 * Returns: 392 * Nothing 393 * Parms: 394 * io_base The IO port base address for the 395 * TLAN device with the EEPROM to 396 * use. 397 * 398 * This function sends a start cycle to an EEPROM attached 399 * to a TLAN chip. 400 * 401 **************************************************************/ 402 403 static void TLan_EeSendStart( u16 io_base ) 404 { 405 u16 sio; 406 407 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR ); 408 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; 409 410 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 411 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 412 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 413 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); 414 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 415 416 } /* TLan_EeSendStart */ 417 418 /*************************************************************** 419 * TLan_EeSendByte 420 * 421 * Returns: 422 * If the correct ack was received, 0, otherwise 1 423 * Parms: io_base The IO port base address for the 424 * TLAN device with the EEPROM to 425 * use. 426 * data The 8 bits of information to 427 * send to the EEPROM. 428 * stop If TLAN_EEPROM_STOP is passed, a 429 * stop cycle is sent after the 430 * byte is sent after the ack is 431 * read. 432 * 433 * This function sends a byte on the serial EEPROM line, 434 * driving the clock to send each bit. The function then 435 * reverses transmission direction and reads an acknowledge 436 * bit. 437 * 438 **************************************************************/ 439 440 static int TLan_EeSendByte( u16 io_base, u8 data, int stop ) 441 { 442 int err; 443 u8 place; 444 u16 sio; 445 446 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR ); 447 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; 448 449 /* Assume clock is low, tx is enabled; */ 450 for ( place = 0x80; place != 0; place >>= 1 ) { 451 if ( place & data ) 452 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 453 else 454 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); 455 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 456 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 457 } 458 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio ); 459 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 460 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio ); 461 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 462 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 463 464 if ( ( ! err ) && stop ) { 465 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */ 466 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 467 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 468 } 469 470 return ( err ); 471 472 } /* TLan_EeSendByte */ 473 474 /*************************************************************** 475 * TLan_EeReceiveByte 476 * 477 * Returns: 478 * Nothing 479 * Parms: 480 * io_base The IO port base address for the 481 * TLAN device with the EEPROM to 482 * use. 483 * data An address to a char to hold the 484 * data sent from the EEPROM. 485 * stop If TLAN_EEPROM_STOP is passed, a 486 * stop cycle is sent after the 487 * byte is received, and no ack is 488 * sent. 489 * 490 * This function receives 8 bits of data from the EEPROM 491 * over the serial link. It then sends and ack bit, or no 492 * ack and a stop bit. This function is used to retrieve 493 * data after the address of a byte in the EEPROM has been 494 * sent. 495 * 496 **************************************************************/ 497 498 static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop ) 499 { 500 u8 place; 501 u16 sio; 502 503 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR ); 504 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; 505 *data = 0; 506 507 /* Assume clock is low, tx is enabled; */ 508 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio ); 509 for ( place = 0x80; place; place >>= 1 ) { 510 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 511 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) ) 512 *data |= place; 513 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 514 } 515 516 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 517 if ( ! stop ) { 518 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */ 519 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 520 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 521 } else { 522 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */ 523 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 524 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 525 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */ 526 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 527 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 528 } 529 530 } /* TLan_EeReceiveByte */ 531 532 /*************************************************************** 533 * TLan_EeReadByte 534 * 535 * Returns: 536 * No error = 0, else, the stage at which the error 537 * occurred. 538 * Parms: 539 * io_base The IO port base address for the 540 * TLAN device with the EEPROM to 541 * use. 542 * ee_addr The address of the byte in the 543 * EEPROM whose contents are to be 544 * retrieved. 545 * data An address to a char to hold the 546 * data obtained from the EEPROM. 547 * 548 * This function reads a byte of information from an byte 549 * cell in the EEPROM. 550 * 551 **************************************************************/ 552 553 static int TLan_EeReadByte( u16 io_base, u8 ee_addr, u8 *data ) 554 { 555 int err; 556 unsigned long flags = 0; 557 int ret=0; 558 559 TLan_EeSendStart( io_base ); 560 err = TLan_EeSendByte( io_base, 0xA0, TLAN_EEPROM_ACK ); 561 if (err) 562 { 563 ret=1; 564 goto fail; 565 } 566 err = TLan_EeSendByte( io_base, ee_addr, TLAN_EEPROM_ACK ); 567 if (err) 568 { 569 ret=2; 570 goto fail; 571 } 572 TLan_EeSendStart( io_base ); 573 err = TLan_EeSendByte( io_base, 0xA1, TLAN_EEPROM_ACK ); 574 if (err) 575 { 576 ret=3; 577 goto fail; 578 } 579 TLan_EeReceiveByte( io_base, data, TLAN_EEPROM_STOP ); 580 fail: 581 582 return ret; 583 584 } /* TLan_EeReadByte */ 585 586 #if 0 587 /* Not yet converted from Linux driver */ 588 /***************************************************************************** 589 ****************************************************************************** 590 591 ThunderLAN Driver PHY Layer Routines 592 593 ****************************************************************************** 594 *****************************************************************************/ 595 596 /********************************************************************* 597 * TLan_PhyPrint 598 * 599 * Returns: 600 * Nothing 601 * Parms: 602 * dev A pointer to the device structure of the 603 * TLAN device having the PHYs to be detailed. 604 * 605 * This function prints the registers a PHY (aka tranceiver). 606 * 607 ********************************************************************/ 608 609 void TLan_PhyPrint( struct net_device *dev ) 610 { 611 TLanPrivateInfo *priv = dev->priv; 612 u16 i, data0, data1, data2, data3, phy; 613 614 phy = priv->phy[priv->phyNum]; 615 616 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) { 617 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name ); 618 } else if ( phy <= TLAN_PHY_MAX_ADDR ) { 619 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy ); 620 printk( "TLAN: Off. +0 +1 +2 +3 \n" ); 621 for ( i = 0; i < 0x20; i+= 4 ) { 622 printk( "TLAN: 0x%02x", i ); 623 TLan_MiiReadReg( dev, phy, i, &data0 ); 624 printk( " 0x%04hx", data0 ); 625 TLan_MiiReadReg( dev, phy, i + 1, &data1 ); 626 printk( " 0x%04hx", data1 ); 627 TLan_MiiReadReg( dev, phy, i + 2, &data2 ); 628 printk( " 0x%04hx", data2 ); 629 TLan_MiiReadReg( dev, phy, i + 3, &data3 ); 630 printk( " 0x%04hx\n", data3 ); 631 } 632 } else { 633 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name ); 634 } 635 636 } /* TLan_PhyPrint */ 637 638 /********************************************************************* 639 * TLan_PhyDetect 640 * 641 * Returns: 642 * Nothing 643 * Parms: 644 * dev A pointer to the device structure of the adapter 645 * for which the PHY needs determined. 646 * 647 * So far I've found that adapters which have external PHYs 648 * may also use the internal PHY for part of the functionality. 649 * (eg, AUI/Thinnet). This function finds out if this TLAN 650 * chip has an internal PHY, and then finds the first external 651 * PHY (starting from address 0) if it exists). 652 * 653 ********************************************************************/ 654 655 void TLan_PhyDetect( struct net_device *dev ) 656 { 657 TLanPrivateInfo *priv = dev->priv; 658 u16 control; 659 u16 hi; 660 u16 lo; 661 u32 phy; 662 663 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) { 664 priv->phyNum = 0xFFFF; 665 return; 666 } 667 668 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi ); 669 670 if ( hi != 0xFFFF ) { 671 priv->phy[0] = TLAN_PHY_MAX_ADDR; 672 } else { 673 priv->phy[0] = TLAN_PHY_NONE; 674 } 675 676 priv->phy[1] = TLAN_PHY_NONE; 677 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) { 678 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control ); 679 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi ); 680 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo ); 681 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) { 682 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo ); 683 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) { 684 priv->phy[1] = phy; 685 } 686 } 687 } 688 689 if ( priv->phy[1] != TLAN_PHY_NONE ) { 690 priv->phyNum = 1; 691 } else if ( priv->phy[0] != TLAN_PHY_NONE ) { 692 priv->phyNum = 0; 693 } else { 694 printk( "TLAN: Cannot initialize device, no PHY was found!\n" ); 695 } 696 697 } /* TLan_PhyDetect */ 698 699 void TLan_PhyPowerDown( struct net_device *dev ) 700 { 701 TLanPrivateInfo *priv = dev->priv; 702 u16 value; 703 704 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name ); 705 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE; 706 TLan_MiiSync( dev->base_addr ); 707 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value ); 708 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) { 709 TLan_MiiSync( dev->base_addr ); 710 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value ); 711 } 712 713 /* Wait for 50 ms and powerup 714 * This is abitrary. It is intended to make sure the 715 * tranceiver settles. 716 */ 717 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP ); 718 719 } /* TLan_PhyPowerDown */ 720 721 void TLan_PhyPowerUp( struct net_device *dev ) 722 { 723 TLanPrivateInfo *priv = dev->priv; 724 u16 value; 725 726 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name ); 727 TLan_MiiSync( dev->base_addr ); 728 value = MII_GC_LOOPBK; 729 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value ); 730 TLan_MiiSync(dev->base_addr); 731 /* Wait for 500 ms and reset the 732 * tranceiver. The TLAN docs say both 50 ms and 733 * 500 ms, so do the longer, just in case. 734 */ 735 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET ); 736 737 } /* TLan_PhyPowerUp */ 738 739 void TLan_PhyReset( struct net_device *dev ) 740 { 741 TLanPrivateInfo *priv = dev->priv; 742 u16 phy; 743 u16 value; 744 745 phy = priv->phy[priv->phyNum]; 746 747 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name ); 748 TLan_MiiSync( dev->base_addr ); 749 value = MII_GC_LOOPBK | MII_GC_RESET; 750 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value ); 751 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value ); 752 while ( value & MII_GC_RESET ) { 753 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value ); 754 } 755 756 /* Wait for 500 ms and initialize. 757 * I don't remember why I wait this long. 758 * I've changed this to 50ms, as it seems long enough. 759 */ 760 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK ); 761 762 } /* TLan_PhyReset */ 763 764 void TLan_PhyStartLink( struct net_device *dev ) 765 { 766 TLanPrivateInfo *priv = dev->priv; 767 u16 ability; 768 u16 control; 769 u16 data; 770 u16 phy; 771 u16 status; 772 u16 tctl; 773 774 phy = priv->phy[priv->phyNum]; 775 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name ); 776 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 777 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability ); 778 779 if ( ( status & MII_GS_AUTONEG ) && 780 ( ! priv->aui ) ) { 781 ability = status >> 11; 782 if ( priv->speed == TLAN_SPEED_10 && 783 priv->duplex == TLAN_DUPLEX_HALF) { 784 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000); 785 } else if ( priv->speed == TLAN_SPEED_10 && 786 priv->duplex == TLAN_DUPLEX_FULL) { 787 priv->tlanFullDuplex = TRUE; 788 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100); 789 } else if ( priv->speed == TLAN_SPEED_100 && 790 priv->duplex == TLAN_DUPLEX_HALF) { 791 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000); 792 } else if ( priv->speed == TLAN_SPEED_100 && 793 priv->duplex == TLAN_DUPLEX_FULL) { 794 priv->tlanFullDuplex = TRUE; 795 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100); 796 } else { 797 798 /* Set Auto-Neg advertisement */ 799 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1); 800 /* Enablee Auto-Neg */ 801 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 ); 802 /* Restart Auto-Neg */ 803 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 ); 804 /* Wait for 4 sec for autonegotiation 805 * to complete. The max spec time is less than this 806 * but the card need additional time to start AN. 807 * .5 sec should be plenty extra. 808 */ 809 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name ); 810 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN ); 811 return; 812 } 813 814 } 815 816 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) { 817 priv->phyNum = 0; 818 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 819 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data ); 820 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN ); 821 return; 822 } else if ( priv->phyNum == 0 ) { 823 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl ); 824 if ( priv->aui ) { 825 tctl |= TLAN_TC_AUISEL; 826 } else { 827 tctl &= ~TLAN_TC_AUISEL; 828 control = 0; 829 if ( priv->duplex == TLAN_DUPLEX_FULL ) { 830 control |= MII_GC_DUPLEX; 831 priv->tlanFullDuplex = TRUE; 832 } 833 if ( priv->speed == TLAN_SPEED_100 ) { 834 control |= MII_GC_SPEEDSEL; 835 } 836 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control ); 837 } 838 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl ); 839 } 840 841 /* Wait for 2 sec to give the tranceiver time 842 * to establish link. 843 */ 844 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET ); 845 846 } /* TLan_PhyStartLink */ 847 848 void TLan_PhyFinishAutoNeg( struct net_device *dev ) 849 { 850 TLanPrivateInfo *priv = dev->priv; 851 u16 an_adv; 852 u16 an_lpa; 853 u16 data; 854 u16 mode; 855 u16 phy; 856 u16 status; 857 858 phy = priv->phy[priv->phyNum]; 859 860 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 861 udelay( 1000 ); 862 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 863 864 if ( ! ( status & MII_GS_AUTOCMPLT ) ) { 865 /* Wait for 8 sec to give the process 866 * more time. Perhaps we should fail after a while. 867 */ 868 if (!priv->neg_be_verbose++) { 869 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n"); 870 printk(KERN_INFO "TLAN: Please check that your adapter has\n"); 871 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n"); 872 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n"); 873 } 874 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN ); 875 return; 876 } 877 878 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name ); 879 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv ); 880 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa ); 881 mode = an_adv & an_lpa & 0x03E0; 882 if ( mode & 0x0100 ) { 883 priv->tlanFullDuplex = TRUE; 884 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) { 885 priv->tlanFullDuplex = TRUE; 886 } 887 888 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) { 889 priv->phyNum = 0; 890 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 891 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data ); 892 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN ); 893 return; 894 } 895 896 if ( priv->phyNum == 0 ) { 897 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) { 898 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX ); 899 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" ); 900 } else { 901 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB ); 902 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" ); 903 } 904 } 905 906 /* Wait for 100 ms. No reason in partiticular. 907 */ 908 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET ); 909 910 } /* TLan_PhyFinishAutoNeg */ 911 912 #ifdef MONITOR 913 914 /********************************************************************* 915 * 916 * TLan_phyMonitor 917 * 918 * Returns: 919 * None 920 * 921 * Params: 922 * dev The device structure of this device. 923 * 924 * 925 * This function monitors PHY condition by reading the status 926 * register via the MII bus. This can be used to give info 927 * about link changes (up/down), and possible switch to alternate 928 * media. 929 * 930 * ******************************************************************/ 931 932 void TLan_PhyMonitor( struct net_device *dev ) 933 { 934 TLanPrivateInfo *priv = dev->priv; 935 u16 phy; 936 u16 phy_status; 937 938 phy = priv->phy[priv->phyNum]; 939 940 /* Get PHY status register */ 941 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status ); 942 943 /* Check if link has been lost */ 944 if (!(phy_status & MII_GS_LINK)) { 945 if (priv->link) { 946 priv->link = 0; 947 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name); 948 dev->flags &= ~IFF_RUNNING; 949 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT ); 950 return; 951 } 952 } 953 954 /* Link restablished? */ 955 if ((phy_status & MII_GS_LINK) && !priv->link) { 956 priv->link = 1; 957 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name); 958 dev->flags |= IFF_RUNNING; 959 } 960 961 /* Setup a new monitor */ 962 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT ); 963 } 964 965 #endif /* MONITOR */ 966 967 /***************************************************************************** 968 ****************************************************************************** 969 970 ThunderLAN Driver MII Routines 971 972 These routines are based on the information in Chap. 2 of the 973 "ThunderLAN Programmer's Guide", pp. 15-24. 974 975 ****************************************************************************** 976 *****************************************************************************/ 977 978 /*************************************************************** 979 * TLan_MiiReadReg 980 * 981 * Returns: 982 * 0 if ack received ok 983 * 1 otherwise. 984 * 985 * Parms: 986 * dev The device structure containing 987 * The io address and interrupt count 988 * for this device. 989 * phy The address of the PHY to be queried. 990 * reg The register whose contents are to be 991 * retreived. 992 * val A pointer to a variable to store the 993 * retrieved value. 994 * 995 * This function uses the TLAN's MII bus to retreive the contents 996 * of a given register on a PHY. It sends the appropriate info 997 * and then reads the 16-bit register value from the MII bus via 998 * the TLAN SIO register. 999 * 1000 **************************************************************/ 1001 1002 int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val ) 1003 { 1004 u8 nack; 1005 u16 sio, tmp; 1006 u32 i; 1007 int err; 1008 int minten; 1009 TLanPrivateInfo *priv = dev->priv; 1010 unsigned long flags = 0; 1011 1012 err = FALSE; 1013 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); 1014 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; 1015 1016 if (!in_irq()) 1017 spin_lock_irqsave(&priv->lock, flags); 1018 1019 TLan_MiiSync(dev->base_addr); 1020 1021 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio ); 1022 if ( minten ) 1023 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio); 1024 1025 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */ 1026 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */ 1027 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */ 1028 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */ 1029 1030 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */ 1031 1032 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */ 1033 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 1034 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */ 1035 1036 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */ 1037 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */ 1038 if (nack) { /* No ACK, so fake it */ 1039 for (i = 0; i < 16; i++) { 1040 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); 1041 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 1042 } 1043 tmp = 0xffff; 1044 err = TRUE; 1045 } else { /* ACK, so read data */ 1046 for (tmp = 0, i = 0x8000; i; i >>= 1) { 1047 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); 1048 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio)) 1049 tmp |= i; 1050 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 1051 } 1052 } 1053 1054 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */ 1055 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 1056 1057 if ( minten ) 1058 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio); 1059 1060 *val = tmp; 1061 1062 if (!in_irq()) 1063 spin_unlock_irqrestore(&priv->lock, flags); 1064 1065 return err; 1066 1067 } /* TLan_MiiReadReg */ 1068 1069 /*************************************************************** 1070 * TLan_MiiSendData 1071 * 1072 * Returns: 1073 * Nothing 1074 * Parms: 1075 * base_port The base IO port of the adapter in 1076 * question. 1077 * dev The address of the PHY to be queried. 1078 * data The value to be placed on the MII bus. 1079 * num_bits The number of bits in data that are to 1080 * be placed on the MII bus. 1081 * 1082 * This function sends on sequence of bits on the MII 1083 * configuration bus. 1084 * 1085 **************************************************************/ 1086 1087 void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits ) 1088 { 1089 u16 sio; 1090 u32 i; 1091 1092 if ( num_bits == 0 ) 1093 return; 1094 1095 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR ); 1096 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO; 1097 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio ); 1098 1099 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) { 1100 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); 1101 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio ); 1102 if ( data & i ) 1103 TLan_SetBit( TLAN_NET_SIO_MDATA, sio ); 1104 else 1105 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio ); 1106 TLan_SetBit( TLAN_NET_SIO_MCLK, sio ); 1107 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio ); 1108 } 1109 1110 } /* TLan_MiiSendData */ 1111 1112 /*************************************************************** 1113 * TLan_MiiSync 1114 * 1115 * Returns: 1116 * Nothing 1117 * Parms: 1118 * base_port The base IO port of the adapter in 1119 * question. 1120 * 1121 * This functions syncs all PHYs in terms of the MII configuration 1122 * bus. 1123 * 1124 **************************************************************/ 1125 1126 void TLan_MiiSync( u16 base_port ) 1127 { 1128 int i; 1129 u16 sio; 1130 1131 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR ); 1132 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO; 1133 1134 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio ); 1135 for ( i = 0; i < 32; i++ ) { 1136 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); 1137 TLan_SetBit( TLAN_NET_SIO_MCLK, sio ); 1138 } 1139 1140 } /* TLan_MiiSync */ 1141 1142 /*************************************************************** 1143 * TLan_MiiWriteReg 1144 * 1145 * Returns: 1146 * Nothing 1147 * Parms: 1148 * dev The device structure for the device 1149 * to write to. 1150 * phy The address of the PHY to be written to. 1151 * reg The register whose contents are to be 1152 * written. 1153 * val The value to be written to the register. 1154 * 1155 * This function uses the TLAN's MII bus to write the contents of a 1156 * given register on a PHY. It sends the appropriate info and then 1157 * writes the 16-bit register value from the MII configuration bus 1158 * via the TLAN SIO register. 1159 * 1160 **************************************************************/ 1161 1162 void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val ) 1163 { 1164 u16 sio; 1165 int minten; 1166 unsigned long flags = 0; 1167 TLanPrivateInfo *priv = dev->priv; 1168 1169 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); 1170 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; 1171 1172 if (!in_irq()) 1173 spin_lock_irqsave(&priv->lock, flags); 1174 1175 TLan_MiiSync( dev->base_addr ); 1176 1177 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio ); 1178 if ( minten ) 1179 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio ); 1180 1181 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */ 1182 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */ 1183 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */ 1184 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */ 1185 1186 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */ 1187 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */ 1188 1189 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */ 1190 TLan_SetBit( TLAN_NET_SIO_MCLK, sio ); 1191 1192 if ( minten ) 1193 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio ); 1194 1195 if (!in_irq()) 1196 spin_unlock_irqrestore(&priv->lock, flags); 1197 1198 } /* TLan_MiiWriteReg */ 1199 #endif 1200 1201 /************************************************************************** 1202 RESET - Reset adapter 1203 ***************************************************************************/ 1204 static void skel_reset(struct nic *nic) 1205 { 1206 /* put the card in its initial state */ 1207 } 1208 1209 /************************************************************************** 1210 POLL - Wait for a frame 1211 ***************************************************************************/ 1212 static int skel_poll(struct nic *nic) 1213 { 1214 /* return true if there's an ethernet packet ready to read */ 1215 /* nic->packet should contain data on return */ 1216 /* nic->packetlen should contain length of data */ 1217 return (0); /* initially as this is called to flush the input */ 1218 } 1219 1220 /************************************************************************** 1221 TRANSMIT - Transmit a frame 1222 ***************************************************************************/ 1223 static void skel_transmit( 1224 struct nic *nic, 1225 const char *d, /* Destination */ 1226 unsigned int t, /* Type */ 1227 unsigned int s, /* size */ 1228 const char *p) /* Packet */ 1229 { 1230 /* send the packet to destination */ 1231 } 1232 1233 /************************************************************************** 1234 DISABLE - Turn off ethernet interface 1235 ***************************************************************************/ 1236 static void skel_disable(struct nic *nic) 1237 { 1238 } 1239 1240 /************************************************************************** 1241 PROBE - Look for an adapter, this routine's visible to the outside 1242 You should omit the last argument struct pci_device * for a non-PCI NIC 1243 ***************************************************************************/ 1244 struct nic *tlan_probe(struct nic *nic, unsigned short *probe_addrs, 1245 struct pci_device *p) 1246 { 1247 /* if probe_addrs is 0, then routine can use a hardwired default */ 1248 /* if board found */ 1249 { 1250 /* point to NIC specific routines */ 1251 nic->reset = skel_reset; 1252 nic->poll = skel_poll; 1253 nic->transmit = skel_transmit; 1254 nic->disable = skel_disable; 1255 return nic; 1256 } 1257 /* else */ 1258 return 0; 1259 } 1260 1261 #if 0 1262 #ifndef TLAN_H 1263 #define TLAN_H 1264 /******************************************************************** 1265 * 1266 * Linux ThunderLAN Driver 1267 * 1268 * tlan.h 1269 * by James Banks 1270 * 1271 * (C) 1997-1998 Caldera, Inc. 1272 * (C) 1999-2001 Torben Mathiasen 1273 * 1274 * This software may be used and distributed according to the terms 1275 * of the GNU General Public License, incorporated herein by reference. 1276 * 1277 ** This file is best viewed/edited with tabstop=4, colums>=132 1278 * 1279 * 1280 * Dec 10, 1999 Torben Mathiasen <torben.mathiasen (at) compaq.com> 1281 * New Maintainer 1282 * 1283 ********************************************************************/ 1284 1285 #include <asm/io.h> 1286 #include <asm/types.h> 1287 #include <linux/netdevice.h> 1288 1289 #define FALSE 0 1290 #define TRUE 1 1291 1292 #define TX_TIMEOUT (10*HZ) /* We need time for auto-neg */ 1293 1294 typedef struct tlan_adapter_entry { 1295 u16 vendorId; 1296 u16 deviceId; 1297 char *deviceLabel; 1298 u32 flags; 1299 u16 addrOfs; 1300 } TLanAdapterEntry; 1301 1302 /***************************************************************** 1303 * EISA Definitions 1304 * 1305 ****************************************************************/ 1306 1307 #define EISA_ID 0xc80 /* EISA ID Registers */ 1308 #define EISA_ID0 0xc80 /* EISA ID Register 0 */ 1309 #define EISA_ID1 0xc81 /* EISA ID Register 1 */ 1310 #define EISA_ID2 0xc82 /* EISA ID Register 2 */ 1311 #define EISA_ID3 0xc83 /* EISA ID Register 3 */ 1312 #define EISA_CR 0xc84 /* EISA Control Register */ 1313 #define EISA_REG0 0xc88 /* EISA Configuration Register 0 */ 1314 #define EISA_REG1 0xc89 /* EISA Configuration Register 1 */ 1315 #define EISA_REG2 0xc8a /* EISA Configuration Register 2 */ 1316 #define EISA_REG3 0xc8f /* EISA Configuration Register 3 */ 1317 #define EISA_APROM 0xc90 /* Ethernet Address PROM */ 1318 1319 /***************************************************************** 1320 * Rx/Tx List Definitions 1321 * 1322 ****************************************************************/ 1323 1324 typedef struct tlan_buffer_ref_tag { 1325 u32 count; 1326 u32 address; 1327 } TLanBufferRef; 1328 1329 typedef struct tlan_list_tag { 1330 u32 forward; 1331 u16 cStat; 1332 u16 frameSize; 1333 TLanBufferRef buffer[TLAN_BUFFERS_PER_LIST]; 1334 } TLanList; 1335 1336 typedef u8 TLanBuffer[TLAN_MAX_FRAME_SIZE]; 1337 1338 /***************************************************************** 1339 * TLAN Private Information Structure 1340 * 1341 ****************************************************************/ 1342 1343 typedef struct tlan_private_tag { 1344 struct net_device *nextDevice; 1345 void *dmaStorage; 1346 u8 *padBuffer; 1347 TLanList *rxList; 1348 u8 *rxBuffer; 1349 u32 rxHead; 1350 u32 rxTail; 1351 u32 rxEocCount; 1352 TLanList *txList; 1353 u8 *txBuffer; 1354 u32 txHead; 1355 u32 txInProgress; 1356 u32 txTail; 1357 u32 txBusyCount; 1358 u32 phyOnline; 1359 u32 timerSetAt; 1360 u32 timerType; 1361 struct timer_list timer; 1362 struct net_device_stats stats; 1363 struct board *adapter; 1364 u32 adapterRev; 1365 u32 aui; 1366 u32 debug; 1367 u32 duplex; 1368 u32 phy[2]; 1369 u32 phyNum; 1370 u32 speed; 1371 u8 tlanRev; 1372 u8 tlanFullDuplex; 1373 char devName[8]; 1374 spinlock_t lock; 1375 u8 link; 1376 u8 is_eisa; 1377 struct tq_struct tlan_tqueue; 1378 u8 neg_be_verbose; 1379 } TLanPrivateInfo; 1380 1381 #define TLAN_HC_GO 0x80000000 1382 #define TLAN_HC_STOP 0x40000000 1383 #define TLAN_HC_ACK 0x20000000 1384 #define TLAN_HC_CS_MASK 0x1FE00000 1385 #define TLAN_HC_EOC 0x00100000 1386 #define TLAN_HC_RT 0x00080000 1387 #define TLAN_HC_NES 0x00040000 1388 #define TLAN_HC_AD_RST 0x00008000 1389 #define TLAN_HC_LD_TMR 0x00004000 1390 #define TLAN_HC_LD_THR 0x00002000 1391 #define TLAN_HC_REQ_INT 0x00001000 1392 #define TLAN_HC_INT_OFF 0x00000800 1393 #define TLAN_HC_INT_ON 0x00000400 1394 #define TLAN_HC_AC_MASK 0x000000FF 1395 #define TLAN_DA_ADR_INC 0x8000 1396 #define TLAN_DA_RAM_ADR 0x4000 1397 #define TLAN_HI_IV_MASK 0x1FE0 1398 #define TLAN_HI_IT_MASK 0x001C 1399 1400 #define TLAN_NET_CMD_NRESET 0x80 1401 #define TLAN_NET_CMD_NWRAP 0x40 1402 #define TLAN_NET_CMD_CSF 0x20 1403 #define TLAN_NET_CMD_CAF 0x10 1404 #define TLAN_NET_CMD_NOBRX 0x08 1405 #define TLAN_NET_CMD_DUPLEX 0x04 1406 #define TLAN_NET_CMD_TRFRAM 0x02 1407 #define TLAN_NET_CMD_TXPACE 0x01 1408 #define TLAN_NET_SIO_MINTEN 0x80 1409 #define TLAN_NET_SIO_ECLOK 0x40 1410 #define TLAN_NET_SIO_ETXEN 0x20 1411 #define TLAN_NET_SIO_EDATA 0x10 1412 #define TLAN_NET_SIO_NMRST 0x08 1413 #define TLAN_NET_SIO_MCLK 0x04 1414 #define TLAN_NET_SIO_MTXEN 0x02 1415 #define TLAN_NET_SIO_MDATA 0x01 1416 #define TLAN_NET_STS_MIRQ 0x80 1417 #define TLAN_NET_STS_HBEAT 0x40 1418 #define TLAN_NET_STS_TXSTOP 0x20 1419 #define TLAN_NET_STS_RXSTOP 0x10 1420 #define TLAN_NET_STS_RSRVD 0x0F 1421 #define TLAN_NET_MASK_MASK7 0x80 1422 #define TLAN_NET_MASK_MASK6 0x40 1423 #define TLAN_NET_MASK_MASK5 0x20 1424 #define TLAN_NET_MASK_MASK4 0x10 1425 #define TLAN_NET_MASK_RSRVD 0x0F 1426 #define TLAN_NET_CFG_RCLK 0x8000 1427 #define TLAN_NET_CFG_TCLK 0x4000 1428 #define TLAN_NET_CFG_BIT 0x2000 1429 #define TLAN_NET_CFG_RXCRC 0x1000 1430 #define TLAN_NET_CFG_PEF 0x0800 1431 #define TLAN_NET_CFG_1FRAG 0x0400 1432 #define TLAN_NET_CFG_1CHAN 0x0200 1433 #define TLAN_NET_CFG_MTEST 0x0100 1434 #define TLAN_NET_CFG_PHY_EN 0x0080 1435 #define TLAN_NET_CFG_MSMASK 0x007F 1436 #define TLAN_LED_ACT 0x10 1437 #define TLAN_LED_LINK 0x01 1438 #define TLAN_ID_TX_EOC 0x04 1439 #define TLAN_ID_RX_EOF 0x02 1440 #define TLAN_ID_RX_EOC 0x01 1441 1442 #define CIRC_INC( a, b ) if ( ++a >= b ) a = 0 1443 1444 #ifdef I_LIKE_A_FAST_HASH_FUNCTION 1445 /* given 6 bytes, view them as 8 6-bit numbers and return the XOR of those */ 1446 /* the code below is about seven times as fast as the original code */ 1447 inline u32 TLan_HashFunc( u8 *a ) 1448 { 1449 u8 hash; 1450 1451 hash = (a[0]^a[3]); /* & 077 */ 1452 hash ^= ((a[0]^a[3])>>6); /* & 003 */ 1453 hash ^= ((a[1]^a[4])<<2); /* & 074 */ 1454 hash ^= ((a[1]^a[4])>>4); /* & 017 */ 1455 hash ^= ((a[2]^a[5])<<4); /* & 060 */ 1456 hash ^= ((a[2]^a[5])>>2); /* & 077 */ 1457 1458 return (hash & 077); 1459 } 1460 1461 #else /* original code */ 1462 1463 inline u32 xor( u32 a, u32 b ) 1464 { 1465 return ( ( a && ! b ) || ( ! a && b ) ); 1466 } 1467 #define XOR8( a, b, c, d, e, f, g, h ) xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) ) 1468 #define DA( a, bit ) ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) ) 1469 1470 inline u32 TLan_HashFunc( u8 *a ) 1471 { 1472 u32 hash; 1473 1474 hash = XOR8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30), DA(a,36), DA(a,42) ); 1475 hash |= XOR8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31), DA(a,37), DA(a,43) ) << 1; 1476 hash |= XOR8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32), DA(a,38), DA(a,44) ) << 2; 1477 hash |= XOR8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33), DA(a,39), DA(a,45) ) << 3; 1478 hash |= XOR8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34), DA(a,40), DA(a,46) ) << 4; 1479 hash |= XOR8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35), DA(a,41), DA(a,47) ) << 5; 1480 1481 return hash; 1482 1483 } 1484 1485 #endif /* I_LIKE_A_FAST_HASH_FUNCTION */ 1486 #endif 1487 /******************************************************************************* 1488 * 1489 * Linux ThunderLAN Driver 1490 * 1491 * tlan.c 1492 * by James Banks 1493 * 1494 * (C) 1997-1998 Caldera, Inc. 1495 * (C) 1998 James Banks 1496 * (C) 1999-2001 Torben Mathiasen 1497 * 1498 * This software may be used and distributed according to the terms 1499 * of the GNU General Public License, incorporated herein by reference. 1500 * 1501 ** This file is best viewed/edited with columns>=132. 1502 * 1503 ** Useful (if not required) reading: 1504 * 1505 * Texas Instruments, ThunderLAN Programmer's Guide, 1506 * TI Literature Number SPWU013A 1507 * available in PDF format from www.ti.com 1508 * Level One, LXT901 and LXT970 Data Sheets 1509 * available in PDF format from www.level1.com 1510 * National Semiconductor, DP83840A Data Sheet 1511 * available in PDF format from www.national.com 1512 * Microchip Technology, 24C01A/02A/04A Data Sheet 1513 * available in PDF format from www.microchip.com 1514 * 1515 * Change History 1516 * 1517 * Tigran Aivazian <tigran (at) sco.com>: TLan_PciProbe() now uses 1518 * new PCI BIOS interface. 1519 * Alan Cox <alan (at) redhat.com>: Fixed the out of memory 1520 * handling. 1521 * 1522 * Torben Mathiasen <torben.mathiasen (at) compaq.com> New Maintainer! 1523 * 1524 * v1.1 Dec 20, 1999 - Removed linux version checking 1525 * Patch from Tigran Aivazian. 1526 * - v1.1 includes Alan's SMP updates. 1527 * - We still have problems on SMP though, 1528 * but I'm looking into that. 1529 * 1530 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock. 1531 * - Removed dependency of HZ being 100. 1532 * - We now allow higher priority timers to 1533 * overwrite timers like TLAN_TIMER_ACTIVITY 1534 * Patch from John Cagle <john.cagle (at) compaq.com>. 1535 * - Fixed a few compiler warnings. 1536 * 1537 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues. 1538 * - Removed call to pci_present(). 1539 * - Removed SA_INTERRUPT flag from irq handler. 1540 * - Added __init and __initdata to reduce resisdent 1541 * code size. 1542 * - Driver now uses module_init/module_exit. 1543 * - Rewrote init_module and tlan_probe to 1544 * share a lot more code. We now use tlan_probe 1545 * with builtin and module driver. 1546 * - Driver ported to new net API. 1547 * - tlan.txt has been reworked to reflect current 1548 * driver (almost) 1549 * - Other minor stuff 1550 * 1551 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's 1552 * network cleanup in 2.3.43pre7 (Tigran & myself) 1553 * - Minor stuff. 1554 * 1555 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver 1556 * if no cable/link were present. 1557 * - Cosmetic changes. 1558 * - TODO: Port completely to new PCI/DMA API 1559 * Auto-Neg fallback. 1560 * 1561 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't 1562 * tested it though, as the kernel support is currently 1563 * broken (2.3.99p4p3). 1564 * - Updated tlan.txt accordingly. 1565 * - Adjusted minimum/maximum frame length. 1566 * - There is now a TLAN website up at 1567 * http://tlan.kernel.dk 1568 * 1569 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now 1570 * reports PHY information when used with Donald 1571 * Beckers userspace MII diagnostics utility. 1572 * 1573 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings. 1574 * - Added link information to Auto-Neg and forced 1575 * modes. When NIC operates with auto-neg the driver 1576 * will report Link speed & duplex modes as well as 1577 * link partner abilities. When forced link is used, 1578 * the driver will report status of the established 1579 * link. 1580 * Please read tlan.txt for additional information. 1581 * - Removed call to check_region(), and used 1582 * return value of request_region() instead. 1583 * 1584 * v1.8a May 28, 2000 - Minor updates. 1585 * 1586 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues. 1587 * - Updated with timer fixes from Andrew Morton. 1588 * - Fixed module race in TLan_Open. 1589 * - Added routine to monitor PHY status. 1590 * - Added activity led support for Proliant devices. 1591 * 1592 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers 1593 * like the Compaq NetFlex3/E. 1594 * - Rewrote tlan_probe to better handle multiple 1595 * bus probes. Probing and device setup is now 1596 * done through TLan_Probe and TLan_init_one. Actual 1597 * hardware probe is done with kernel API and 1598 * TLan_EisaProbe. 1599 * - Adjusted debug information for probing. 1600 * - Fixed bug that would cause general debug information 1601 * to be printed after driver removal. 1602 * - Added transmit timeout handling. 1603 * - Fixed OOM return values in tlan_probe. 1604 * - Fixed possible mem leak in tlan_exit 1605 * (now tlan_remove_one). 1606 * - Fixed timer bug in TLan_phyMonitor. 1607 * - This driver version is alpha quality, please 1608 * send me any bug issues you may encounter. 1609 * 1610 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was 1611 * set for EISA cards. 1612 * - Added support for NetFlex3/E with nibble-rate 1613 * 10Base-T PHY. This is untestet as I haven't got 1614 * one of these cards. 1615 * - Fixed timer being added twice. 1616 * - Disabled PhyMonitoring by default as this is 1617 * work in progress. Define MONITOR to enable it. 1618 * - Now we don't display link info with PHYs that 1619 * doesn't support it (level1). 1620 * - Incresed tx_timeout beacuse of auto-neg. 1621 * - Adjusted timers for forced speeds. 1622 * 1623 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.) 1624 * 1625 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues 1626 * when link can't be established. 1627 * - Added the bbuf option as a kernel parameter. 1628 * - Fixed ioaddr probe bug. 1629 * - Fixed stupid deadlock with MII interrupts. 1630 * - Added support for speed/duplex selection with 1631 * multiple nics. 1632 * - Added partly fix for TX Channel lockup with 1633 * TLAN v1.0 silicon. This needs to be investigated 1634 * further. 1635 * 1636 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per. 1637 * interrupt. Thanks goes to 1638 * Adam Keys <adam (at) ti.com> 1639 * Denis Beaudoin <dbeaudoin (at) ti.com> 1640 * for providing the patch. 1641 * - Fixed auto-neg output when using multiple 1642 * adapters. 1643 * - Converted to use new taskq interface. 1644 * 1645 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.) 1646 * 1647 *******************************************************************************/ 1648 1649 1650 #include <linux/module.h> 1651 1652 #include "tlan.h" 1653 1654 #include <linux/init.h> 1655 #include <linux/ioport.h> 1656 #include <linux/pci.h> 1657 #include <linux/etherdevice.h> 1658 #include <linux/delay.h> 1659 #include <linux/spinlock.h> 1660 #include <linux/mii.h> 1661 1662 typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 ); 1663 1664 /* For removing EISA devices */ 1665 static struct net_device *TLan_Eisa_Devices; 1666 1667 static int TLanDevicesInstalled; 1668 1669 /* Set speed, duplex and aui settings */ 1670 static int aui[MAX_TLAN_BOARDS]; 1671 static int duplex[MAX_TLAN_BOARDS]; 1672 static int speed[MAX_TLAN_BOARDS]; 1673 static int boards_found; 1674 1675 MODULE_AUTHOR("Maintainer: Torben Mathiasen <torben.mathiasen (at) compaq.com>"); 1676 MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters"); 1677 MODULE_LICENSE("GPL"); 1678 1679 MODULE_PARM(aui, "1-" __MODULE_STRING(MAX_TLAN_BOARDS) "i"); 1680 MODULE_PARM(duplex, "1-" __MODULE_STRING(MAX_TLAN_BOARDS) "i"); 1681 MODULE_PARM(speed, "1-" __MODULE_STRING(MAX_TLAN_BOARDS) "i"); 1682 MODULE_PARM(debug, "i"); 1683 MODULE_PARM(bbuf, "i"); 1684 MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)"); 1685 MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)"); 1686 MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)"); 1687 MODULE_PARM_DESC(debug, "ThunderLAN debug mask"); 1688 MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)"); 1689 EXPORT_NO_SYMBOLS; 1690 1691 /* Define this to enable Link beat monitoring */ 1692 #undef MONITOR 1693 1694 /* Turn on debugging. See linux/Documentation/networking/tlan.txt for details */ 1695 static int debug; 1696 1697 static int bbuf; 1698 static u8 *TLanPadBuffer; 1699 static char TLanSignature[] = "TLAN"; 1700 static const char tlan_banner[] = "ThunderLAN driver v1.14a\n"; 1701 static int tlan_have_pci; 1702 static int tlan_have_eisa; 1703 1704 const char *media[] = { 1705 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ", 1706 "100baseTx-FD", "100baseT4", 0 1707 }; 1708 1709 int media_map[] = { 0x0020, 0x0040, 0x0080, 0x0100, 0x0200,}; 1710 1711 static struct board { 1712 const char *deviceLabel; 1713 u32 flags; 1714 u16 addrOfs; 1715 } board_info[] __devinitdata = { 1716 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 1717 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 1718 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 }, 1719 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 }, 1720 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 }, 1721 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 1722 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 }, 1723 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 }, 1724 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 }, 1725 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 }, 1726 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 }, 1727 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 1728 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 }, 1729 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */ 1730 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 }, 1731 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */ 1732 }; 1733 1734 static struct pci_device_id tlan_pci_tbl[] __devinitdata = { 1735 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10, 1736 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 1737 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100, 1738 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, 1739 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I, 1740 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, 1741 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER, 1742 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, 1743 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B, 1744 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 }, 1745 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI, 1746 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }, 1747 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D, 1748 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 }, 1749 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I, 1750 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 }, 1751 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183, 1752 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 }, 1753 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325, 1754 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 }, 1755 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326, 1756 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 }, 1757 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100, 1758 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 }, 1759 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2, 1760 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 }, 1761 { 0,} 1762 }; 1763 MODULE_DEVICE_TABLE(pci, tlan_pci_tbl); 1764 1765 static void TLan_EisaProbe( void ); 1766 static void TLan_Eisa_Cleanup( void ); 1767 static int TLan_Init( struct net_device * ); 1768 static int TLan_Open( struct net_device *dev ); 1769 static int TLan_StartTx( struct sk_buff *, struct net_device *); 1770 static void TLan_HandleInterrupt( int, void *, struct pt_regs *); 1771 static int TLan_Close( struct net_device *); 1772 static struct net_device_stats *TLan_GetStats( struct net_device *); 1773 static void TLan_SetMulticastList( struct net_device *); 1774 static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd); 1775 static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent); 1776 static void TLan_tx_timeout( struct net_device *dev); 1777 static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent); 1778 1779 static u32 TLan_HandleInvalid( struct net_device *, u16 ); 1780 static u32 TLan_HandleTxEOF( struct net_device *, u16 ); 1781 static u32 TLan_HandleStatOverflow( struct net_device *, u16 ); 1782 static u32 TLan_HandleRxEOF( struct net_device *, u16 ); 1783 static u32 TLan_HandleDummy( struct net_device *, u16 ); 1784 static u32 TLan_HandleTxEOC( struct net_device *, u16 ); 1785 static u32 TLan_HandleStatusCheck( struct net_device *, u16 ); 1786 static u32 TLan_HandleRxEOC( struct net_device *, u16 ); 1787 1788 static void TLan_Timer( unsigned long ); 1789 1790 static void TLan_ResetLists( struct net_device * ); 1791 static void TLan_FreeLists( struct net_device * ); 1792 static void TLan_PrintDio( u16 ); 1793 static void TLan_PrintList( TLanList *, char *, int ); 1794 static void TLan_ReadAndClearStats( struct net_device *, int ); 1795 static void TLan_ResetAdapter( struct net_device * ); 1796 static void TLan_FinishReset( struct net_device * ); 1797 static void TLan_SetMac( struct net_device *, int areg, char *mac ); 1798 1799 static void TLan_PhyPrint( struct net_device * ); 1800 static void TLan_PhyDetect( struct net_device * ); 1801 static void TLan_PhyPowerDown( struct net_device * ); 1802 static void TLan_PhyPowerUp( struct net_device * ); 1803 static void TLan_PhyReset( struct net_device * ); 1804 static void TLan_PhyStartLink( struct net_device * ); 1805 static void TLan_PhyFinishAutoNeg( struct net_device * ); 1806 #ifdef MONITOR 1807 static void TLan_PhyMonitor( struct net_device * ); 1808 #endif 1809 1810 /* 1811 static int TLan_PhyNop( struct net_device * ); 1812 static int TLan_PhyInternalCheck( struct net_device * ); 1813 static int TLan_PhyInternalService( struct net_device * ); 1814 static int TLan_PhyDp83840aCheck( struct net_device * ); 1815 */ 1816 1817 static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * ); 1818 static void TLan_MiiSendData( u16, u32, unsigned ); 1819 static void TLan_MiiSync( u16 ); 1820 static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 ); 1821 1822 static void TLan_EeSendStart( u16 ); 1823 static int TLan_EeSendByte( u16, u8, int ); 1824 static void TLan_EeReceiveByte( u16, u8 *, int ); 1825 static int TLan_EeReadByte( struct net_device *, u8, u8 * ); 1826 1827 static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = { 1828 TLan_HandleInvalid, 1829 TLan_HandleTxEOF, 1830 TLan_HandleStatOverflow, 1831 TLan_HandleRxEOF, 1832 TLan_HandleDummy, 1833 TLan_HandleTxEOC, 1834 TLan_HandleStatusCheck, 1835 TLan_HandleRxEOC 1836 }; 1837 1838 static inline void 1839 TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type ) 1840 { 1841 TLanPrivateInfo *priv = dev->priv; 1842 unsigned long flags = 0; 1843 1844 if (!in_irq()) 1845 spin_lock_irqsave(&priv->lock, flags); 1846 if ( priv->timer.function != NULL && 1847 priv->timerType != TLAN_TIMER_ACTIVITY ) { 1848 if (!in_irq()) 1849 spin_unlock_irqrestore(&priv->lock, flags); 1850 return; 1851 } 1852 priv->timer.function = &TLan_Timer; 1853 if (!in_irq()) 1854 spin_unlock_irqrestore(&priv->lock, flags); 1855 1856 priv->timer.data = (unsigned long) dev; 1857 priv->timerSetAt = jiffies; 1858 priv->timerType = type; 1859 mod_timer(&priv->timer, jiffies + ticks); 1860 1861 } /* TLan_SetTimer */ 1862 1863 /***************************************************************************** 1864 ****************************************************************************** 1865 1866 ThunderLAN Driver Primary Functions 1867 1868 These functions are more or less common to all Linux network drivers. 1869 1870 ****************************************************************************** 1871 *****************************************************************************/ 1872 1873 /*************************************************************** 1874 * tlan_remove_one 1875 * 1876 * Returns: 1877 * Nothing 1878 * Parms: 1879 * None 1880 * 1881 * Goes through the TLanDevices list and frees the device 1882 * structs and memory associated with each device (lists 1883 * and buffers). It also ureserves the IO port regions 1884 * associated with this device. 1885 * 1886 **************************************************************/ 1887 1888 static void __devexit tlan_remove_one( struct pci_dev *pdev) 1889 { 1890 struct net_device *dev = pci_get_drvdata( pdev ); 1891 TLanPrivateInfo *priv = dev->priv; 1892 1893 unregister_netdev( dev ); 1894 1895 if ( priv->dmaStorage ) { 1896 kfree( priv->dmaStorage ); 1897 } 1898 1899 release_region( dev->base_addr, 0x10 ); 1900 1901 kfree( dev ); 1902 1903 pci_set_drvdata( pdev, NULL ); 1904 } 1905 1906 static struct pci_driver tlan_driver = { 1907 name: "tlan", 1908 id_table: tlan_pci_tbl, 1909 probe: tlan_init_one, 1910 remove: tlan_remove_one, 1911 }; 1912 1913 static int __init tlan_probe(void) 1914 { 1915 static int pad_allocated; 1916 1917 printk(KERN_INFO "%s", tlan_banner); 1918 1919 TLanPadBuffer = (u8 *) kmalloc(TLAN_MIN_FRAME_SIZE, 1920 GFP_KERNEL); 1921 1922 if (TLanPadBuffer == NULL) { 1923 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n"); 1924 return -ENOMEM; 1925 } 1926 1927 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE); 1928 pad_allocated = 1; 1929 1930 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n"); 1931 1932 /* Use new style PCI probing. Now the kernel will 1933 do most of this for us */ 1934 pci_register_driver(&tlan_driver); 1935 1936 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n"); 1937 TLan_EisaProbe(); 1938 1939 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n", 1940 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s", 1941 tlan_have_pci, tlan_have_eisa); 1942 1943 if (TLanDevicesInstalled == 0) { 1944 pci_unregister_driver(&tlan_driver); 1945 kfree(TLanPadBuffer); 1946 return -ENODEV; 1947 } 1948 return 0; 1949 } 1950 1951 1952 static int __devinit tlan_init_one( struct pci_dev *pdev, 1953 const struct pci_device_id *ent) 1954 { 1955 return TLan_probe1( pdev, -1, -1, 0, ent); 1956 } 1957 1958 /* 1959 *************************************************************** 1960 * tlan_probe1 1961 * 1962 * Returns: 1963 * 0 on success, error code on error 1964 * Parms: 1965 * none 1966 * 1967 * The name is lower case to fit in with all the rest of 1968 * the netcard_probe names. This function looks for 1969 * another TLan based adapter, setting it up with the 1970 * allocated device struct if one is found. 1971 * tlan_probe has been ported to the new net API and 1972 * now allocates its own device structure. This function 1973 * is also used by modules. 1974 * 1975 **************************************************************/ 1976 1977 static int __devinit TLan_probe1(struct pci_dev *pdev, 1978 long ioaddr, int irq, int rev, const struct pci_device_id *ent ) 1979 { 1980 1981 struct net_device *dev; 1982 TLanPrivateInfo *priv; 1983 u8 pci_rev; 1984 u16 device_id; 1985 int reg; 1986 1987 if (pdev && pci_enable_device(pdev)) 1988 return -EIO; 1989 1990 dev = init_etherdev(NULL, sizeof(TLanPrivateInfo)); 1991 if (dev == NULL) { 1992 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n"); 1993 return -ENOMEM; 1994 } 1995 SET_MODULE_OWNER(dev); 1996 1997 priv = dev->priv; 1998 1999 /* Is this a PCI device? */ 2000 if (pdev) { 2001 u32 pci_io_base = 0; 2002 2003 priv->adapter = &board_info[ent->driver_data]; 2004 2005 pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev); 2006 2007 for ( reg= 0; reg <= 5; reg ++ ) { 2008 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) { 2009 pci_io_base = pci_resource_start(pdev, reg); 2010 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n", 2011 pci_io_base); 2012 break; 2013 } 2014 } 2015 if (!pci_io_base) { 2016 printk(KERN_ERR "TLAN: No IO mappings available\n"); 2017 unregister_netdev(dev); 2018 kfree(dev); 2019 return -ENODEV; 2020 } 2021 2022 dev->base_addr = pci_io_base; 2023 dev->irq = pdev->irq; 2024 priv->adapterRev = pci_rev; 2025 pci_set_master(pdev); 2026 pci_set_drvdata(pdev, dev); 2027 2028 } else { /* EISA card */ 2029 /* This is a hack. We need to know which board structure 2030 * is suited for this adapter */ 2031 device_id = inw(ioaddr + EISA_ID2); 2032 priv->is_eisa = 1; 2033 if (device_id == 0x20F1) { 2034 priv->adapter = &board_info[13]; /* NetFlex-3/E */ 2035 priv->adapterRev = 23; /* TLAN 2.3 */ 2036 } else { 2037 priv->adapter = &board_info[14]; 2038 priv->adapterRev = 10; /* TLAN 1.0 */ 2039 } 2040 dev->base_addr = ioaddr; 2041 dev->irq = irq; 2042 } 2043 2044 /* Kernel parameters */ 2045 if (dev->mem_start) { 2046 priv->aui = dev->mem_start & 0x01; 2047 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1; 2048 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3; 2049 2050 if (priv->speed == 0x1) { 2051 priv->speed = TLAN_SPEED_10; 2052 } else if (priv->speed == 0x2) { 2053 priv->speed = TLAN_SPEED_100; 2054 } 2055 debug = priv->debug = dev->mem_end; 2056 } else { 2057 priv->aui = aui[boards_found]; 2058 priv->speed = speed[boards_found]; 2059 priv->duplex = duplex[boards_found]; 2060 priv->debug = debug; 2061 } 2062 2063 /* This will be used when we get an adapter error from 2064 * within our irq handler */ 2065 INIT_LIST_HEAD(&priv->tlan_tqueue.list); 2066 priv->tlan_tqueue.sync = 0; 2067 priv->tlan_tqueue.routine = (void *)(void*)TLan_tx_timeout; 2068 priv->tlan_tqueue.data = dev; 2069 2070 spin_lock_init(&priv->lock); 2071 2072 if (TLan_Init(dev)) { 2073 printk(KERN_ERR "TLAN: Could not register device.\n"); 2074 unregister_netdev(dev); 2075 kfree(dev); 2076 return -EAGAIN; 2077 } else { 2078 2079 TLanDevicesInstalled++; 2080 boards_found++; 2081 2082 /* pdev is NULL if this is an EISA device */ 2083 if (pdev) 2084 tlan_have_pci++; 2085 else { 2086 priv->nextDevice = TLan_Eisa_Devices; 2087 TLan_Eisa_Devices = dev; 2088 tlan_have_eisa++; 2089 } 2090 2091 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n", 2092 dev->name, 2093 (int) dev->irq, 2094 (int) dev->base_addr, 2095 priv->adapter->deviceLabel, 2096 priv->adapterRev); 2097 return 0; 2098 } 2099 2100 } 2101 2102 static void TLan_Eisa_Cleanup(void) 2103 { 2104 struct net_device *dev; 2105 TLanPrivateInfo *priv; 2106 2107 while( tlan_have_eisa ) { 2108 dev = TLan_Eisa_Devices; 2109 priv = dev->priv; 2110 if (priv->dmaStorage) { 2111 kfree(priv->dmaStorage); 2112 } 2113 release_region( dev->base_addr, 0x10); 2114 unregister_netdev( dev ); 2115 TLan_Eisa_Devices = priv->nextDevice; 2116 kfree( dev ); 2117 tlan_have_eisa--; 2118 } 2119 } 2120 2121 2122 static void __exit tlan_exit(void) 2123 { 2124 pci_unregister_driver(&tlan_driver); 2125 2126 if (tlan_have_eisa) 2127 TLan_Eisa_Cleanup(); 2128 2129 kfree( TLanPadBuffer ); 2130 2131 } 2132 2133 /* Module loading/unloading */ 2134 module_init(tlan_probe); 2135 module_exit(tlan_exit); 2136 2137 /************************************************************** 2138 * TLan_EisaProbe 2139 * 2140 * Returns: 0 on success, 1 otherwise 2141 * 2142 * Parms: None 2143 * 2144 * 2145 * This functions probes for EISA devices and calls 2146 * TLan_probe1 when one is found. 2147 * 2148 *************************************************************/ 2149 2150 static void __init TLan_EisaProbe (void) 2151 { 2152 long ioaddr; 2153 int rc = -ENODEV; 2154 int irq; 2155 u16 device_id; 2156 2157 if (!EISA_bus) { 2158 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n"); 2159 return; 2160 } 2161 2162 /* Loop through all slots of the EISA bus */ 2163 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) { 2164 2165 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID)); 2166 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2)); 2167 2168 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ", 2169 (int) ioaddr); 2170 if (request_region(ioaddr, 0x10, TLanSignature) == NULL) 2171 goto out; 2172 2173 if (inw(ioaddr + EISA_ID) != 0x110E) { 2174 release_region(ioaddr, 0x10); 2175 goto out; 2176 } 2177 2178 device_id = inw(ioaddr + EISA_ID2); 2179 if (device_id != 0x20F1 && device_id != 0x40F1) { 2180 release_region (ioaddr, 0x10); 2181 goto out; 2182 } 2183 2184 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */ 2185 release_region (ioaddr, 0x10); 2186 goto out2; 2187 } 2188 2189 if (debug == 0x10) 2190 printk("Found one\n"); 2191 2192 /* Get irq from board */ 2193 switch (inb(ioaddr + 0xCC0)) { 2194 case(0x10): 2195 irq=5; 2196 break; 2197 case(0x20): 2198 irq=9; 2199 break; 2200 case(0x40): 2201 irq=10; 2202 break; 2203 case(0x80): 2204 irq=11; 2205 break; 2206 default: 2207 goto out; 2208 } 2209 2210 2211 /* Setup the newly found eisa adapter */ 2212 rc = TLan_probe1( NULL, ioaddr, irq, 2213 12, NULL); 2214 continue; 2215 2216 out: 2217 if (debug == 0x10) 2218 printk("None found\n"); 2219 continue; 2220 2221 out2: if (debug == 0x10) 2222 printk("Card found but it is not enabled, skipping\n"); 2223 continue; 2224 2225 } 2226 2227 } /* TLan_EisaProbe */ 2228 2229 2230 2231 /*************************************************************** 2232 * TLan_Init 2233 * 2234 * Returns: 2235 * 0 on success, error code otherwise. 2236 * Parms: 2237 * dev The structure of the device to be 2238 * init'ed. 2239 * 2240 * This function completes the initialization of the 2241 * device structure and driver. It reserves the IO 2242 * addresses, allocates memory for the lists and bounce 2243 * buffers, retrieves the MAC address from the eeprom 2244 * and assignes the device's methods. 2245 * 2246 **************************************************************/ 2247 2248 static int TLan_Init( struct net_device *dev ) 2249 { 2250 int dma_size; 2251 int err; 2252 int i; 2253 TLanPrivateInfo *priv; 2254 2255 priv = dev->priv; 2256 2257 if (!priv->is_eisa) /* EISA devices have already requested IO */ 2258 if (!request_region( dev->base_addr, 0x10, TLanSignature )) { 2259 printk(KERN_ERR "TLAN: %s: IO port region 0x%lx size 0x%x in use.\n", 2260 dev->name, 2261 dev->base_addr, 2262 0x10 ); 2263 return -EIO; 2264 } 2265 2266 if ( bbuf ) { 2267 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS ) 2268 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE ); 2269 } else { 2270 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS ) 2271 * ( sizeof(TLanList) ); 2272 } 2273 priv->dmaStorage = kmalloc(dma_size, GFP_KERNEL | GFP_DMA); 2274 if ( priv->dmaStorage == NULL ) { 2275 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n", 2276 dev->name ); 2277 release_region( dev->base_addr, 0x10 ); 2278 return -ENOMEM; 2279 } 2280 memset( priv->dmaStorage, 0, dma_size ); 2281 priv->rxList = (TLanList *) 2282 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 ); 2283 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS; 2284 if ( bbuf ) { 2285 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS ); 2286 priv->txBuffer = priv->rxBuffer 2287 + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE ); 2288 } 2289 2290 err = 0; 2291 for ( i = 0; i < 6 ; i++ ) 2292 err |= TLan_EeReadByte( dev, 2293 (u8) priv->adapter->addrOfs + i, 2294 (u8 *) &dev->dev_addr[i] ); 2295 if ( err ) { 2296 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n", 2297 dev->name, 2298 err ); 2299 } 2300 dev->addr_len = 6; 2301 2302 /* Device methods */ 2303 dev->open = &TLan_Open; 2304 dev->hard_start_xmit = &TLan_StartTx; 2305 dev->stop = &TLan_Close; 2306 dev->get_stats = &TLan_GetStats; 2307 dev->set_multicast_list = &TLan_SetMulticastList; 2308 dev->do_ioctl = &TLan_ioctl; 2309 dev->tx_timeout = &TLan_tx_timeout; 2310 dev->watchdog_timeo = TX_TIMEOUT; 2311 2312 return 0; 2313 2314 } /* TLan_Init */ 2315 2316 /*************************************************************** 2317 * TLan_Open 2318 * 2319 * Returns: 2320 * 0 on success, error code otherwise. 2321 * Parms: 2322 * dev Structure of device to be opened. 2323 * 2324 * This routine puts the driver and TLAN adapter in a 2325 * state where it is ready to send and receive packets. 2326 * It allocates the IRQ, resets and brings the adapter 2327 * out of reset, and allows interrupts. It also delays 2328 * the startup for autonegotiation or sends a Rx GO 2329 * command to the adapter, as appropriate. 2330 * 2331 **************************************************************/ 2332 2333 static int TLan_Open( struct net_device *dev ) 2334 { 2335 TLanPrivateInfo *priv = dev->priv; 2336 int err; 2337 2338 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION ); 2339 err = request_irq( dev->irq, TLan_HandleInterrupt, SA_SHIRQ, TLanSignature, dev ); 2340 2341 if ( err ) { 2342 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq ); 2343 return err; 2344 } 2345 2346 init_timer(&priv->timer); 2347 netif_start_queue(dev); 2348 2349 /* NOTE: It might not be necessary to read the stats before a 2350 reset if you don't care what the values are. 2351 */ 2352 TLan_ResetLists( dev ); 2353 TLan_ReadAndClearStats( dev, TLAN_IGNORE ); 2354 TLan_ResetAdapter( dev ); 2355 2356 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev ); 2357 2358 return 0; 2359 2360 } /* TLan_Open */ 2361 2362 /************************************************************** 2363 * TLan_ioctl 2364 * 2365 * Returns: 2366 * 0 on success, error code otherwise 2367 * Params: 2368 * dev structure of device to receive ioctl. 2369 * 2370 * rq ifreq structure to hold userspace data. 2371 * 2372 * cmd ioctl command. 2373 * 2374 * 2375 *************************************************************/ 2376 2377 static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2378 { 2379 TLanPrivateInfo *priv = dev->priv; 2380 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data; 2381 u32 phy = priv->phy[priv->phyNum]; 2382 2383 if (!priv->phyOnline) 2384 return -EAGAIN; 2385 2386 switch(cmd) { 2387 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2388 case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */ 2389 data->phy_id = phy; 2390 2391 case SIOCGMIIREG: /* Read MII PHY register. */ 2392 case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */ 2393 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out); 2394 return 0; 2395 2396 2397 case SIOCSMIIREG: /* Write MII PHY register. */ 2398 case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */ 2399 if (!capable(CAP_NET_ADMIN)) 2400 return -EPERM; 2401 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2402 return 0; 2403 default: 2404 return -EOPNOTSUPP; 2405 } 2406 } /* tlan_ioctl */ 2407 2408 /*************************************************************** 2409 * TLan_tx_timeout 2410 * 2411 * Returns: nothing 2412 * 2413 * Params: 2414 * dev structure of device which timed out 2415 * during transmit. 2416 * 2417 **************************************************************/ 2418 2419 static void TLan_tx_timeout(struct net_device *dev) 2420 { 2421 2422 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name); 2423 2424 /* Ok so we timed out, lets see what we can do about it...*/ 2425 TLan_FreeLists( dev ); 2426 TLan_ResetLists( dev ); 2427 TLan_ReadAndClearStats( dev, TLAN_IGNORE ); 2428 TLan_ResetAdapter( dev ); 2429 dev->trans_start = jiffies; 2430 netif_wake_queue( dev ); 2431 2432 } 2433 2434 2435 /*************************************************************** 2436 * TLan_StartTx 2437 * 2438 * Returns: 2439 * 0 on success, non-zero on failure. 2440 * Parms: 2441 * skb A pointer to the sk_buff containing the 2442 * frame to be sent. 2443 * dev The device to send the data on. 2444 * 2445 * This function adds a frame to the Tx list to be sent 2446 * ASAP. First it verifies that the adapter is ready and 2447 * there is room in the queue. Then it sets up the next 2448 * available list, copies the frame to the corresponding 2449 * buffer. If the adapter Tx channel is idle, it gives 2450 * the adapter a Tx Go command on the list, otherwise it 2451 * sets the forward address of the previous list to point 2452 * to this one. Then it frees the sk_buff. 2453 * 2454 **************************************************************/ 2455 2456 static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev ) 2457 { 2458 TLanPrivateInfo *priv = dev->priv; 2459 TLanList *tail_list; 2460 u8 *tail_buffer; 2461 int pad; 2462 unsigned long flags; 2463 2464 if ( ! priv->phyOnline ) { 2465 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name ); 2466 dev_kfree_skb_any(skb); 2467 return 0; 2468 } 2469 2470 tail_list = priv->txList + priv->txTail; 2471 2472 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) { 2473 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail ); 2474 netif_stop_queue(dev); 2475 priv->txBusyCount++; 2476 return 1; 2477 } 2478 2479 tail_list->forward = 0; 2480 2481 if ( bbuf ) { 2482 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE ); 2483 memcpy( tail_buffer, skb->data, skb->len ); 2484 } else { 2485 tail_list->buffer[0].address = virt_to_bus( skb->data ); 2486 tail_list->buffer[9].address = (u32) skb; 2487 } 2488 2489 pad = TLAN_MIN_FRAME_SIZE - skb->len; 2490 2491 if ( pad > 0 ) { 2492 tail_list->frameSize = (u16) skb->len + pad; 2493 tail_list->buffer[0].count = (u32) skb->len; 2494 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad; 2495 tail_list->buffer[1].address = virt_to_bus( TLanPadBuffer ); 2496 } else { 2497 tail_list->frameSize = (u16) skb->len; 2498 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len; 2499 tail_list->buffer[1].count = 0; 2500 tail_list->buffer[1].address = 0; 2501 } 2502 2503 spin_lock_irqsave(&priv->lock, flags); 2504 tail_list->cStat = TLAN_CSTAT_READY; 2505 if ( ! priv->txInProgress ) { 2506 priv->txInProgress = 1; 2507 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail ); 2508 outl( virt_to_bus( tail_list ), dev->base_addr + TLAN_CH_PARM ); 2509 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD ); 2510 } else { 2511 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail ); 2512 if ( priv->txTail == 0 ) { 2513 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = virt_to_bus( tail_list ); 2514 } else { 2515 ( priv->txList + ( priv->txTail - 1 ) )->forward = virt_to_bus( tail_list ); 2516 } 2517 } 2518 spin_unlock_irqrestore(&priv->lock, flags); 2519 2520 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS ); 2521 2522 if ( bbuf ) 2523 dev_kfree_skb_any(skb); 2524 2525 dev->trans_start = jiffies; 2526 return 0; 2527 2528 } /* TLan_StartTx */ 2529 2530 /*************************************************************** 2531 * TLan_HandleInterrupt 2532 * 2533 * Returns: 2534 * Nothing 2535 * Parms: 2536 * irq The line on which the interrupt 2537 * occurred. 2538 * dev_id A pointer to the device assigned to 2539 * this irq line. 2540 * regs ??? 2541 * 2542 * This function handles an interrupt generated by its 2543 * assigned TLAN adapter. The function deactivates 2544 * interrupts on its adapter, records the type of 2545 * interrupt, executes the appropriate subhandler, and 2546 * acknowdges the interrupt to the adapter (thus 2547 * re-enabling adapter interrupts. 2548 * 2549 **************************************************************/ 2550 2551 static void TLan_HandleInterrupt(int irq, void *dev_id, struct pt_regs *regs) 2552 { 2553 u32 ack; 2554 struct net_device *dev; 2555 u32 host_cmd; 2556 u16 host_int; 2557 int type; 2558 TLanPrivateInfo *priv; 2559 2560 dev = dev_id; 2561 priv = dev->priv; 2562 2563 spin_lock(&priv->lock); 2564 2565 host_int = inw( dev->base_addr + TLAN_HOST_INT ); 2566 outw( host_int, dev->base_addr + TLAN_HOST_INT ); 2567 2568 type = ( host_int & TLAN_HI_IT_MASK ) >> 2; 2569 2570 ack = TLanIntVector[type]( dev, host_int ); 2571 2572 if ( ack ) { 2573 host_cmd = TLAN_HC_ACK | ack | ( type << 18 ); 2574 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD ); 2575 } 2576 2577 spin_unlock(&priv->lock); 2578 2579 } /* TLan_HandleInterrupts */ 2580 2581 /*************************************************************** 2582 * TLan_Close 2583 * 2584 * Returns: 2585 * An error code. 2586 * Parms: 2587 * dev The device structure of the device to 2588 * close. 2589 * 2590 * This function shuts down the adapter. It records any 2591 * stats, puts the adapter into reset state, deactivates 2592 * its time as needed, and frees the irq it is using. 2593 * 2594 **************************************************************/ 2595 2596 static int TLan_Close(struct net_device *dev) 2597 { 2598 TLanPrivateInfo *priv = dev->priv; 2599 2600 netif_stop_queue(dev); 2601 priv->neg_be_verbose = 0; 2602 2603 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 2604 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD ); 2605 if ( priv->timer.function != NULL ) { 2606 del_timer_sync( &priv->timer ); 2607 priv->timer.function = NULL; 2608 } 2609 2610 free_irq( dev->irq, dev ); 2611 TLan_FreeLists( dev ); 2612 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name ); 2613 2614 return 0; 2615 2616 } /* TLan_Close */ 2617 2618 /*************************************************************** 2619 * TLan_GetStats 2620 * 2621 * Returns: 2622 * A pointer to the device's statistics structure. 2623 * Parms: 2624 * dev The device structure to return the 2625 * stats for. 2626 * 2627 * This function updates the devices statistics by reading 2628 * the TLAN chip's onboard registers. Then it returns the 2629 * address of the statistics structure. 2630 * 2631 **************************************************************/ 2632 2633 static struct net_device_stats *TLan_GetStats( struct net_device *dev ) 2634 { 2635 TLanPrivateInfo *priv = dev->priv; 2636 int i; 2637 2638 /* Should only read stats if open ? */ 2639 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 2640 2641 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount ); 2642 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount ); 2643 if ( debug & TLAN_DEBUG_GNRL ) { 2644 TLan_PrintDio( dev->base_addr ); 2645 TLan_PhyPrint( dev ); 2646 } 2647 if ( debug & TLAN_DEBUG_LIST ) { 2648 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) 2649 TLan_PrintList( priv->rxList + i, "RX", i ); 2650 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) 2651 TLan_PrintList( priv->txList + i, "TX", i ); 2652 } 2653 2654 return ( &( (TLanPrivateInfo *) dev->priv )->stats ); 2655 2656 } /* TLan_GetStats */ 2657 2658 /*************************************************************** 2659 * TLan_SetMulticastList 2660 * 2661 * Returns: 2662 * Nothing 2663 * Parms: 2664 * dev The device structure to set the 2665 * multicast list for. 2666 * 2667 * This function sets the TLAN adaptor to various receive 2668 * modes. If the IFF_PROMISC flag is set, promiscuous 2669 * mode is acitviated. Otherwise, promiscuous mode is 2670 * turned off. If the IFF_ALLMULTI flag is set, then 2671 * the hash table is set to receive all group addresses. 2672 * Otherwise, the first three multicast addresses are 2673 * stored in AREG_1-3, and the rest are selected via the 2674 * hash table, as necessary. 2675 * 2676 **************************************************************/ 2677 2678 static void TLan_SetMulticastList( struct net_device *dev ) 2679 { 2680 struct dev_mc_list *dmi = dev->mc_list; 2681 u32 hash1 = 0; 2682 u32 hash2 = 0; 2683 int i; 2684 u32 offset; 2685 u8 tmp; 2686 2687 if ( dev->flags & IFF_PROMISC ) { 2688 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD ); 2689 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF ); 2690 } else { 2691 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD ); 2692 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF ); 2693 if ( dev->flags & IFF_ALLMULTI ) { 2694 for ( i = 0; i < 3; i++ ) 2695 TLan_SetMac( dev, i + 1, NULL ); 2696 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF ); 2697 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF ); 2698 } else { 2699 for ( i = 0; i < dev->mc_count; i++ ) { 2700 if ( i < 3 ) { 2701 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr ); 2702 } else { 2703 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr ); 2704 if ( offset < 32 ) 2705 hash1 |= ( 1 << offset ); 2706 else 2707 hash2 |= ( 1 << ( offset - 32 ) ); 2708 } 2709 dmi = dmi->next; 2710 } 2711 for ( ; i < 3; i++ ) 2712 TLan_SetMac( dev, i + 1, NULL ); 2713 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 ); 2714 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 ); 2715 } 2716 } 2717 2718 } /* TLan_SetMulticastList */ 2719 2720 /***************************************************************************** 2721 ****************************************************************************** 2722 2723 ThunderLAN Driver Interrupt Vectors and Table 2724 2725 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN 2726 Programmer's Guide" for more informations on handling interrupts 2727 generated by TLAN based adapters. 2728 2729 ****************************************************************************** 2730 *****************************************************************************/ 2731 2732 /*************************************************************** 2733 * TLan_HandleInvalid 2734 * 2735 * Returns: 2736 * 0 2737 * Parms: 2738 * dev Device assigned the IRQ that was 2739 * raised. 2740 * host_int The contents of the HOST_INT 2741 * port. 2742 * 2743 * This function handles invalid interrupts. This should 2744 * never happen unless some other adapter is trying to use 2745 * the IRQ line assigned to the device. 2746 * 2747 **************************************************************/ 2748 2749 u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int ) 2750 { 2751 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */ 2752 return 0; 2753 2754 } /* TLan_HandleInvalid */ 2755 2756 /*************************************************************** 2757 * TLan_HandleTxEOF 2758 * 2759 * Returns: 2760 * 1 2761 * Parms: 2762 * dev Device assigned the IRQ that was 2763 * raised. 2764 * host_int The contents of the HOST_INT 2765 * port. 2766 * 2767 * This function handles Tx EOF interrupts which are raised 2768 * by the adapter when it has completed sending the 2769 * contents of a buffer. If detemines which list/buffer 2770 * was completed and resets it. If the buffer was the last 2771 * in the channel (EOC), then the function checks to see if 2772 * another buffer is ready to send, and if so, sends a Tx 2773 * Go command. Finally, the driver activates/continues the 2774 * activity LED. 2775 * 2776 **************************************************************/ 2777 2778 u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int ) 2779 { 2780 TLanPrivateInfo *priv = dev->priv; 2781 int eoc = 0; 2782 TLanList *head_list; 2783 u32 ack = 0; 2784 u16 tmpCStat; 2785 2786 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail ); 2787 head_list = priv->txList + priv->txHead; 2788 2789 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) { 2790 ack++; 2791 if ( ! bbuf ) { 2792 dev_kfree_skb_any( (struct sk_buff *) head_list->buffer[9].address ); 2793 head_list->buffer[9].address = 0; 2794 } 2795 2796 if ( tmpCStat & TLAN_CSTAT_EOC ) 2797 eoc = 1; 2798 2799 priv->stats.tx_bytes += head_list->frameSize; 2800 2801 head_list->cStat = TLAN_CSTAT_UNUSED; 2802 netif_start_queue(dev); 2803 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS ); 2804 head_list = priv->txList + priv->txHead; 2805 } 2806 2807 if (!ack) 2808 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n"); 2809 2810 if ( eoc ) { 2811 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail ); 2812 head_list = priv->txList + priv->txHead; 2813 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) { 2814 outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM ); 2815 ack |= TLAN_HC_GO; 2816 } else { 2817 priv->txInProgress = 0; 2818 } 2819 } 2820 2821 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) { 2822 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT ); 2823 if ( priv->timer.function == NULL ) { 2824 priv->timer.function = &TLan_Timer; 2825 priv->timer.data = (unsigned long) dev; 2826 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY; 2827 priv->timerSetAt = jiffies; 2828 priv->timerType = TLAN_TIMER_ACTIVITY; 2829 add_timer(&priv->timer); 2830 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) { 2831 priv->timerSetAt = jiffies; 2832 } 2833 } 2834 2835 return ack; 2836 2837 } /* TLan_HandleTxEOF */ 2838 2839 /*************************************************************** 2840 * TLan_HandleStatOverflow 2841 * 2842 * Returns: 2843 * 1 2844 * Parms: 2845 * dev Device assigned the IRQ that was 2846 * raised. 2847 * host_int The contents of the HOST_INT 2848 * port. 2849 * 2850 * This function handles the Statistics Overflow interrupt 2851 * which means that one or more of the TLAN statistics 2852 * registers has reached 1/2 capacity and needs to be read. 2853 * 2854 **************************************************************/ 2855 2856 u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int ) 2857 { 2858 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 2859 2860 return 1; 2861 2862 } /* TLan_HandleStatOverflow */ 2863 2864 /*************************************************************** 2865 * TLan_HandleRxEOF 2866 * 2867 * Returns: 2868 * 1 2869 * Parms: 2870 * dev Device assigned the IRQ that was 2871 * raised. 2872 * host_int The contents of the HOST_INT 2873 * port. 2874 * 2875 * This function handles the Rx EOF interrupt which 2876 * indicates a frame has been received by the adapter from 2877 * the net and the frame has been transferred to memory. 2878 * The function determines the bounce buffer the frame has 2879 * been loaded into, creates a new sk_buff big enough to 2880 * hold the frame, and sends it to protocol stack. It 2881 * then resets the used buffer and appends it to the end 2882 * of the list. If the frame was the last in the Rx 2883 * channel (EOC), the function restarts the receive channel 2884 * by sending an Rx Go command to the adapter. Then it 2885 * activates/continues the activity LED. 2886 * 2887 **************************************************************/ 2888 2889 u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int ) 2890 { 2891 TLanPrivateInfo *priv = dev->priv; 2892 u32 ack = 0; 2893 int eoc = 0; 2894 u8 *head_buffer; 2895 TLanList *head_list; 2896 struct sk_buff *skb; 2897 TLanList *tail_list; 2898 void *t; 2899 u32 frameSize; 2900 u16 tmpCStat; 2901 2902 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail ); 2903 head_list = priv->rxList + priv->rxHead; 2904 2905 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) { 2906 frameSize = head_list->frameSize; 2907 ack++; 2908 if (tmpCStat & TLAN_CSTAT_EOC) 2909 eoc = 1; 2910 2911 if (bbuf) { 2912 skb = dev_alloc_skb(frameSize + 7); 2913 if (skb == NULL) 2914 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n"); 2915 else { 2916 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE); 2917 skb->dev = dev; 2918 skb_reserve(skb, 2); 2919 t = (void *) skb_put(skb, frameSize); 2920 2921 priv->stats.rx_bytes += head_list->frameSize; 2922 2923 memcpy( t, head_buffer, frameSize ); 2924 skb->protocol = eth_type_trans( skb, dev ); 2925 netif_rx( skb ); 2926 } 2927 } else { 2928 struct sk_buff *new_skb; 2929 2930 /* 2931 * I changed the algorithm here. What we now do 2932 * is allocate the new frame. If this fails we 2933 * simply recycle the frame. 2934 */ 2935 2936 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 ); 2937 2938 if ( new_skb != NULL ) { 2939 /* If this ever happened it would be a problem */ 2940 /* not any more - ac */ 2941 skb = (struct sk_buff *) head_list->buffer[9].address; 2942 skb_trim( skb, frameSize ); 2943 2944 priv->stats.rx_bytes += frameSize; 2945 2946 skb->protocol = eth_type_trans( skb, dev ); 2947 netif_rx( skb ); 2948 2949 new_skb->dev = dev; 2950 skb_reserve( new_skb, 2 ); 2951 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE ); 2952 head_list->buffer[0].address = virt_to_bus( t ); 2953 head_list->buffer[8].address = (u32) t; 2954 head_list->buffer[9].address = (u32) new_skb; 2955 } else 2956 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" ); 2957 } 2958 2959 head_list->forward = 0; 2960 head_list->cStat = 0; 2961 tail_list = priv->rxList + priv->rxTail; 2962 tail_list->forward = virt_to_bus( head_list ); 2963 2964 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS ); 2965 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS ); 2966 head_list = priv->rxList + priv->rxHead; 2967 } 2968 2969 if (!ack) 2970 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n"); 2971 2972 2973 if ( eoc ) { 2974 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail ); 2975 head_list = priv->rxList + priv->rxHead; 2976 outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM ); 2977 ack |= TLAN_HC_GO | TLAN_HC_RT; 2978 priv->rxEocCount++; 2979 } 2980 2981 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) { 2982 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT ); 2983 if ( priv->timer.function == NULL ) { 2984 priv->timer.function = &TLan_Timer; 2985 priv->timer.data = (unsigned long) dev; 2986 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY; 2987 priv->timerSetAt = jiffies; 2988 priv->timerType = TLAN_TIMER_ACTIVITY; 2989 add_timer(&priv->timer); 2990 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) { 2991 priv->timerSetAt = jiffies; 2992 } 2993 } 2994 2995 dev->last_rx = jiffies; 2996 2997 return ack; 2998 2999 } /* TLan_HandleRxEOF */ 3000 3001 /*************************************************************** 3002 * TLan_HandleDummy 3003 * 3004 * Returns: 3005 * 1 3006 * Parms: 3007 * dev Device assigned the IRQ that was 3008 * raised. 3009 * host_int The contents of the HOST_INT 3010 * port. 3011 * 3012 * This function handles the Dummy interrupt, which is 3013 * raised whenever a test interrupt is generated by setting 3014 * the Req_Int bit of HOST_CMD to 1. 3015 * 3016 **************************************************************/ 3017 3018 u32 TLan_HandleDummy( struct net_device *dev, u16 host_int ) 3019 { 3020 printk( "TLAN: Test interrupt on %s.\n", dev->name ); 3021 return 1; 3022 3023 } /* TLan_HandleDummy */ 3024 3025 /*************************************************************** 3026 * TLan_HandleTxEOC 3027 * 3028 * Returns: 3029 * 1 3030 * Parms: 3031 * dev Device assigned the IRQ that was 3032 * raised. 3033 * host_int The contents of the HOST_INT 3034 * port. 3035 * 3036 * This driver is structured to determine EOC occurances by 3037 * reading the CSTAT member of the list structure. Tx EOC 3038 * interrupts are disabled via the DIO INTDIS register. 3039 * However, TLAN chips before revision 3.0 didn't have this 3040 * functionality, so process EOC events if this is the 3041 * case. 3042 * 3043 **************************************************************/ 3044 3045 u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int ) 3046 { 3047 TLanPrivateInfo *priv = dev->priv; 3048 TLanList *head_list; 3049 u32 ack = 1; 3050 3051 host_int = 0; 3052 if ( priv->tlanRev < 0x30 ) { 3053 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail ); 3054 head_list = priv->txList + priv->txHead; 3055 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) { 3056 netif_stop_queue(dev); 3057 outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM ); 3058 ack |= TLAN_HC_GO; 3059 } else { 3060 priv->txInProgress = 0; 3061 } 3062 } 3063 3064 return ack; 3065 3066 } /* TLan_HandleTxEOC */ 3067 3068 /*************************************************************** 3069 * TLan_HandleStatusCheck 3070 * 3071 * Returns: 3072 * 0 if Adapter check, 1 if Network Status check. 3073 * Parms: 3074 * dev Device assigned the IRQ that was 3075 * raised. 3076 * host_int The contents of the HOST_INT 3077 * port. 3078 * 3079 * This function handles Adapter Check/Network Status 3080 * interrupts generated by the adapter. It checks the 3081 * vector in the HOST_INT register to determine if it is 3082 * an Adapter Check interrupt. If so, it resets the 3083 * adapter. Otherwise it clears the status registers 3084 * and services the PHY. 3085 * 3086 **************************************************************/ 3087 3088 u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int ) 3089 { 3090 TLanPrivateInfo *priv = dev->priv; 3091 u32 ack; 3092 u32 error; 3093 u8 net_sts; 3094 u32 phy; 3095 u16 tlphy_ctl; 3096 u16 tlphy_sts; 3097 3098 ack = 1; 3099 if ( host_int & TLAN_HI_IV_MASK ) { 3100 netif_stop_queue( dev ); 3101 error = inl( dev->base_addr + TLAN_CH_PARM ); 3102 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error ); 3103 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 3104 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD ); 3105 3106 queue_task(&priv->tlan_tqueue, &tq_immediate); 3107 mark_bh(IMMEDIATE_BH); 3108 3109 netif_wake_queue(dev); 3110 ack = 0; 3111 } else { 3112 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name ); 3113 phy = priv->phy[priv->phyNum]; 3114 3115 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS ); 3116 if ( net_sts ) { 3117 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts ); 3118 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts ); 3119 } 3120 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) { 3121 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts ); 3122 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl ); 3123 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) { 3124 tlphy_ctl |= TLAN_TC_SWAPOL; 3125 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); 3126 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) { 3127 tlphy_ctl &= ~TLAN_TC_SWAPOL; 3128 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); 3129 } 3130 3131 if (debug) { 3132 TLan_PhyPrint( dev ); 3133 } 3134 } 3135 } 3136 3137 return ack; 3138 3139 } /* TLan_HandleStatusCheck */ 3140 3141 /*************************************************************** 3142 * TLan_HandleRxEOC 3143 * 3144 * Returns: 3145 * 1 3146 * Parms: 3147 * dev Device assigned the IRQ that was 3148 * raised. 3149 * host_int The contents of the HOST_INT 3150 * port. 3151 * 3152 * This driver is structured to determine EOC occurances by 3153 * reading the CSTAT member of the list structure. Rx EOC 3154 * interrupts are disabled via the DIO INTDIS register. 3155 * However, TLAN chips before revision 3.0 didn't have this 3156 * CSTAT member or a INTDIS register, so if this chip is 3157 * pre-3.0, process EOC interrupts normally. 3158 * 3159 **************************************************************/ 3160 3161 u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int ) 3162 { 3163 TLanPrivateInfo *priv = dev->priv; 3164 TLanList *head_list; 3165 u32 ack = 1; 3166 3167 if ( priv->tlanRev < 0x30 ) { 3168 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail ); 3169 head_list = priv->rxList + priv->rxHead; 3170 outl( virt_to_bus( head_list ), dev->base_addr + TLAN_CH_PARM ); 3171 ack |= TLAN_HC_GO | TLAN_HC_RT; 3172 priv->rxEocCount++; 3173 } 3174 3175 return ack; 3176 3177 } /* TLan_HandleRxEOC */ 3178 3179 /***************************************************************************** 3180 ****************************************************************************** 3181 3182 ThunderLAN Driver Timer Function 3183 3184 ****************************************************************************** 3185 *****************************************************************************/ 3186 3187 /*************************************************************** 3188 * TLan_Timer 3189 * 3190 * Returns: 3191 * Nothing 3192 * Parms: 3193 * data A value given to add timer when 3194 * add_timer was called. 3195 * 3196 * This function handles timed functionality for the 3197 * TLAN driver. The two current timer uses are for 3198 * delaying for autonegotionation and driving the ACT LED. 3199 * - Autonegotiation requires being allowed about 3200 * 2 1/2 seconds before attempting to transmit a 3201 * packet. It would be a very bad thing to hang 3202 * the kernel this long, so the driver doesn't 3203 * allow transmission 'til after this time, for 3204 * certain PHYs. It would be much nicer if all 3205 * PHYs were interrupt-capable like the internal 3206 * PHY. 3207 * - The ACT LED, which shows adapter activity, is 3208 * driven by the driver, and so must be left on 3209 * for a short period to power up the LED so it 3210 * can be seen. This delay can be changed by 3211 * changing the TLAN_TIMER_ACT_DELAY in tlan.h, 3212 * if desired. 100 ms produces a slightly 3213 * sluggish response. 3214 * 3215 **************************************************************/ 3216 3217 void TLan_Timer( unsigned long data ) 3218 { 3219 struct net_device *dev = (struct net_device *) data; 3220 TLanPrivateInfo *priv = dev->priv; 3221 u32 elapsed; 3222 unsigned long flags = 0; 3223 3224 priv->timer.function = NULL; 3225 3226 switch ( priv->timerType ) { 3227 #ifdef MONITOR 3228 case TLAN_TIMER_LINK_BEAT: 3229 TLan_PhyMonitor( dev ); 3230 break; 3231 #endif 3232 case TLAN_TIMER_PHY_PDOWN: 3233 TLan_PhyPowerDown( dev ); 3234 break; 3235 case TLAN_TIMER_PHY_PUP: 3236 TLan_PhyPowerUp( dev ); 3237 break; 3238 case TLAN_TIMER_PHY_RESET: 3239 TLan_PhyReset( dev ); 3240 break; 3241 case TLAN_TIMER_PHY_START_LINK: 3242 TLan_PhyStartLink( dev ); 3243 break; 3244 case TLAN_TIMER_PHY_FINISH_AN: 3245 TLan_PhyFinishAutoNeg( dev ); 3246 break; 3247 case TLAN_TIMER_FINISH_RESET: 3248 TLan_FinishReset( dev ); 3249 break; 3250 case TLAN_TIMER_ACTIVITY: 3251 spin_lock_irqsave(&priv->lock, flags); 3252 if ( priv->timer.function == NULL ) { 3253 elapsed = jiffies - priv->timerSetAt; 3254 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) { 3255 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK ); 3256 } else { 3257 priv->timer.function = &TLan_Timer; 3258 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY; 3259 spin_unlock_irqrestore(&priv->lock, flags); 3260 add_timer( &priv->timer ); 3261 break; 3262 } 3263 } 3264 spin_unlock_irqrestore(&priv->lock, flags); 3265 break; 3266 default: 3267 break; 3268 } 3269 3270 } /* TLan_Timer */ 3271 3272 /***************************************************************************** 3273 ****************************************************************************** 3274 3275 ThunderLAN Driver Adapter Related Routines 3276 3277 ****************************************************************************** 3278 *****************************************************************************/ 3279 3280 /*************************************************************** 3281 * TLan_ResetLists 3282 * 3283 * Returns: 3284 * Nothing 3285 * Parms: 3286 * dev The device structure with the list 3287 * stuctures to be reset. 3288 * 3289 * This routine sets the variables associated with managing 3290 * the TLAN lists to their initial values. 3291 * 3292 **************************************************************/ 3293 3294 void TLan_ResetLists( struct net_device *dev ) 3295 { 3296 TLanPrivateInfo *priv = dev->priv; 3297 int i; 3298 TLanList *list; 3299 struct sk_buff *skb; 3300 void *t = NULL; 3301 3302 priv->txHead = 0; 3303 priv->txTail = 0; 3304 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) { 3305 list = priv->txList + i; 3306 list->cStat = TLAN_CSTAT_UNUSED; 3307 if ( bbuf ) { 3308 list->buffer[0].address = virt_to_bus( priv->txBuffer + ( i * TLAN_MAX_FRAME_SIZE ) ); 3309 } else { 3310 list->buffer[0].address = 0; 3311 } 3312 list->buffer[2].count = 0; 3313 list->buffer[2].address = 0; 3314 list->buffer[9].address = 0; 3315 } 3316 3317 priv->rxHead = 0; 3318 priv->rxTail = TLAN_NUM_RX_LISTS - 1; 3319 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) { 3320 list = priv->rxList + i; 3321 list->cStat = TLAN_CSTAT_READY; 3322 list->frameSize = TLAN_MAX_FRAME_SIZE; 3323 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER; 3324 if ( bbuf ) { 3325 list->buffer[0].address = virt_to_bus( priv->rxBuffer + ( i * TLAN_MAX_FRAME_SIZE ) ); 3326 } else { 3327 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 ); 3328 if ( skb == NULL ) { 3329 printk( "TLAN: Couldn't allocate memory for received data.\n" ); 3330 /* If this ever happened it would be a problem */ 3331 } else { 3332 skb->dev = dev; 3333 skb_reserve( skb, 2 ); 3334 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE ); 3335 } 3336 list->buffer[0].address = virt_to_bus( t ); 3337 list->buffer[8].address = (u32) t; 3338 list->buffer[9].address = (u32) skb; 3339 } 3340 list->buffer[1].count = 0; 3341 list->buffer[1].address = 0; 3342 if ( i < TLAN_NUM_RX_LISTS - 1 ) 3343 list->forward = virt_to_bus( list + 1 ); 3344 else 3345 list->forward = 0; 3346 } 3347 3348 } /* TLan_ResetLists */ 3349 3350 void TLan_FreeLists( struct net_device *dev ) 3351 { 3352 TLanPrivateInfo *priv = dev->priv; 3353 int i; 3354 TLanList *list; 3355 struct sk_buff *skb; 3356 3357 if ( ! bbuf ) { 3358 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) { 3359 list = priv->txList + i; 3360 skb = (struct sk_buff *) list->buffer[9].address; 3361 if ( skb ) { 3362 dev_kfree_skb_any( skb ); 3363 list->buffer[9].address = 0; 3364 } 3365 } 3366 3367 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) { 3368 list = priv->rxList + i; 3369 skb = (struct sk_buff *) list->buffer[9].address; 3370 if ( skb ) { 3371 dev_kfree_skb_any( skb ); 3372 list->buffer[9].address = 0; 3373 } 3374 } 3375 } 3376 3377 } /* TLan_FreeLists */ 3378 3379 /*************************************************************** 3380 * TLan_PrintDio 3381 * 3382 * Returns: 3383 * Nothing 3384 * Parms: 3385 * io_base Base IO port of the device of 3386 * which to print DIO registers. 3387 * 3388 * This function prints out all the internal (DIO) 3389 * registers of a TLAN chip. 3390 * 3391 **************************************************************/ 3392 3393 void TLan_PrintDio( u16 io_base ) 3394 { 3395 u32 data0, data1; 3396 int i; 3397 3398 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base ); 3399 printk( "TLAN: Off. +0 +4\n" ); 3400 for ( i = 0; i < 0x4C; i+= 8 ) { 3401 data0 = TLan_DioRead32( io_base, i ); 3402 data1 = TLan_DioRead32( io_base, i + 0x4 ); 3403 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 ); 3404 } 3405 3406 } /* TLan_PrintDio */ 3407 3408 /*************************************************************** 3409 * TLan_PrintList 3410 * 3411 * Returns: 3412 * Nothing 3413 * Parms: 3414 * list A pointer to the TLanList structure to 3415 * be printed. 3416 * type A string to designate type of list, 3417 * "Rx" or "Tx". 3418 * num The index of the list. 3419 * 3420 * This function prints out the contents of the list 3421 * pointed to by the list parameter. 3422 * 3423 **************************************************************/ 3424 3425 void TLan_PrintList( TLanList *list, char *type, int num) 3426 { 3427 int i; 3428 3429 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list ); 3430 printk( "TLAN: Forward = 0x%08x\n", list->forward ); 3431 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat ); 3432 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize ); 3433 /* for ( i = 0; i < 10; i++ ) { */ 3434 for ( i = 0; i < 2; i++ ) { 3435 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address ); 3436 } 3437 3438 } /* TLan_PrintList */ 3439 3440 /*************************************************************** 3441 * TLan_ReadAndClearStats 3442 * 3443 * Returns: 3444 * Nothing 3445 * Parms: 3446 * dev Pointer to device structure of adapter 3447 * to which to read stats. 3448 * record Flag indicating whether to add 3449 * 3450 * This functions reads all the internal status registers 3451 * of the TLAN chip, which clears them as a side effect. 3452 * It then either adds the values to the device's status 3453 * struct, or discards them, depending on whether record 3454 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0). 3455 * 3456 **************************************************************/ 3457 3458 void TLan_ReadAndClearStats( struct net_device *dev, int record ) 3459 { 3460 TLanPrivateInfo *priv = dev->priv; 3461 u32 tx_good, tx_under; 3462 u32 rx_good, rx_over; 3463 u32 def_tx, crc, code; 3464 u32 multi_col, single_col; 3465 u32 excess_col, late_col, loss; 3466 3467 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR ); 3468 tx_good = inb( dev->base_addr + TLAN_DIO_DATA ); 3469 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 3470 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16; 3471 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 ); 3472 3473 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR ); 3474 rx_good = inb( dev->base_addr + TLAN_DIO_DATA ); 3475 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 3476 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16; 3477 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 ); 3478 3479 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR ); 3480 def_tx = inb( dev->base_addr + TLAN_DIO_DATA ); 3481 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 3482 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 ); 3483 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 ); 3484 3485 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR ); 3486 multi_col = inb( dev->base_addr + TLAN_DIO_DATA ); 3487 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 3488 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 ); 3489 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8; 3490 3491 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR ); 3492 excess_col = inb( dev->base_addr + TLAN_DIO_DATA ); 3493 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 ); 3494 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 ); 3495 3496 if ( record ) { 3497 priv->stats.rx_packets += rx_good; 3498 priv->stats.rx_errors += rx_over + crc + code; 3499 priv->stats.tx_packets += tx_good; 3500 priv->stats.tx_errors += tx_under + loss; 3501 priv->stats.collisions += multi_col + single_col + excess_col + late_col; 3502 3503 priv->stats.rx_over_errors += rx_over; 3504 priv->stats.rx_crc_errors += crc; 3505 priv->stats.rx_frame_errors += code; 3506 3507 priv->stats.tx_aborted_errors += tx_under; 3508 priv->stats.tx_carrier_errors += loss; 3509 } 3510 3511 } /* TLan_ReadAndClearStats */ 3512 3513 /*************************************************************** 3514 * TLan_Reset 3515 * 3516 * Returns: 3517 * 0 3518 * Parms: 3519 * dev Pointer to device structure of adapter 3520 * to be reset. 3521 * 3522 * This function resets the adapter and it's physical 3523 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN 3524 * Programmer's Guide" for details. The routine tries to 3525 * implement what is detailed there, though adjustments 3526 * have been made. 3527 * 3528 **************************************************************/ 3529 3530 void 3531 TLan_ResetAdapter( struct net_device *dev ) 3532 { 3533 TLanPrivateInfo *priv = dev->priv; 3534 int i; 3535 u32 addr; 3536 u32 data; 3537 u8 data8; 3538 3539 priv->tlanFullDuplex = FALSE; 3540 priv->phyOnline=0; 3541 /* 1. Assert reset bit. */ 3542 3543 data = inl(dev->base_addr + TLAN_HOST_CMD); 3544 data |= TLAN_HC_AD_RST; 3545 outl(data, dev->base_addr + TLAN_HOST_CMD); 3546 3547 udelay(1000); 3548 3549 /* 2. Turn off interrupts. ( Probably isn't necessary ) */ 3550 3551 data = inl(dev->base_addr + TLAN_HOST_CMD); 3552 data |= TLAN_HC_INT_OFF; 3553 outl(data, dev->base_addr + TLAN_HOST_CMD); 3554 3555 /* 3. Clear AREGs and HASHs. */ 3556 3557 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) { 3558 TLan_DioWrite32( dev->base_addr, (u16) i, 0 ); 3559 } 3560 3561 /* 4. Setup NetConfig register. */ 3562 3563 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 3564 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data ); 3565 3566 /* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */ 3567 3568 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD ); 3569 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD ); 3570 3571 /* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */ 3572 3573 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR ); 3574 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; 3575 TLan_SetBit( TLAN_NET_SIO_NMRST, addr ); 3576 3577 /* 7. Setup the remaining registers. */ 3578 3579 if ( priv->tlanRev >= 0x30 ) { 3580 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC; 3581 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 ); 3582 } 3583 TLan_PhyDetect( dev ); 3584 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN; 3585 3586 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) { 3587 data |= TLAN_NET_CFG_BIT; 3588 if ( priv->aui == 1 ) { 3589 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a ); 3590 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) { 3591 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 ); 3592 priv->tlanFullDuplex = TRUE; 3593 } else { 3594 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 ); 3595 } 3596 } 3597 3598 if ( priv->phyNum == 0 ) { 3599 data |= TLAN_NET_CFG_PHY_EN; 3600 } 3601 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data ); 3602 3603 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) { 3604 TLan_FinishReset( dev ); 3605 } else { 3606 TLan_PhyPowerDown( dev ); 3607 } 3608 3609 } /* TLan_ResetAdapter */ 3610 3611 void 3612 TLan_FinishReset( struct net_device *dev ) 3613 { 3614 TLanPrivateInfo *priv = dev->priv; 3615 u8 data; 3616 u32 phy; 3617 u8 sio; 3618 u16 status; 3619 u16 partner; 3620 u16 tlphy_ctl; 3621 u16 tlphy_par; 3622 u16 tlphy_id1, tlphy_id2; 3623 int i; 3624 3625 phy = priv->phy[priv->phyNum]; 3626 3627 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP; 3628 if ( priv->tlanFullDuplex ) { 3629 data |= TLAN_NET_CMD_DUPLEX; 3630 } 3631 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data ); 3632 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5; 3633 if ( priv->phyNum == 0 ) { 3634 data |= TLAN_NET_MASK_MASK7; 3635 } 3636 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data ); 3637 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 ); 3638 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 ); 3639 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 ); 3640 3641 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) { 3642 status = MII_GS_LINK; 3643 printk( "TLAN: %s: Link forced.\n", dev->name ); 3644 } else { 3645 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 3646 udelay( 1000 ); 3647 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 3648 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */ 3649 (tlphy_id1 == NAT_SEM_ID1) && 3650 (tlphy_id2 == NAT_SEM_ID2) ) { 3651 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner ); 3652 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par ); 3653 3654 printk( "TLAN: %s: Link active with ", dev->name ); 3655 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) { 3656 printk( "forced 10%sMbps %s-Duplex\n", 3657 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0", 3658 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half"); 3659 } else { 3660 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n", 3661 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0", 3662 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half"); 3663 printk("TLAN: Partner capability: "); 3664 for (i = 5; i <= 10; i++) 3665 if (partner & (1<<i)) 3666 printk("%s", media[i-5]); 3667 printk("\n"); 3668 } 3669 3670 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK ); 3671 #ifdef MONITOR 3672 /* We have link beat..for now anyway */ 3673 priv->link = 1; 3674 /*Enabling link beat monitoring */ 3675 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT ); 3676 #endif 3677 } else if (status & MII_GS_LINK) { 3678 printk( "TLAN: %s: Link active\n", dev->name ); 3679 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK ); 3680 } 3681 } 3682 3683 if ( priv->phyNum == 0 ) { 3684 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl ); 3685 tlphy_ctl |= TLAN_TC_INTEN; 3686 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl ); 3687 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO ); 3688 sio |= TLAN_NET_SIO_MINTEN; 3689 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio ); 3690 } 3691 3692 if ( status & MII_GS_LINK ) { 3693 TLan_SetMac( dev, 0, dev->dev_addr ); 3694 priv->phyOnline = 1; 3695 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 ); 3696 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) { 3697 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 ); 3698 } 3699 outl( virt_to_bus( priv->rxList ), dev->base_addr + TLAN_CH_PARM ); 3700 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD ); 3701 } else { 3702 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name ); 3703 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET ); 3704 return; 3705 } 3706 3707 } /* TLan_FinishReset */ 3708 3709 /*************************************************************** 3710 * TLan_SetMac 3711 * 3712 * Returns: 3713 * Nothing 3714 * Parms: 3715 * dev Pointer to device structure of adapter 3716 * on which to change the AREG. 3717 * areg The AREG to set the address in (0 - 3). 3718 * mac A pointer to an array of chars. Each 3719 * element stores one byte of the address. 3720 * IE, it isn't in ascii. 3721 * 3722 * This function transfers a MAC address to one of the 3723 * TLAN AREGs (address registers). The TLAN chip locks 3724 * the register on writing to offset 0 and unlocks the 3725 * register after writing to offset 5. If NULL is passed 3726 * in mac, then the AREG is filled with 0's. 3727 * 3728 **************************************************************/ 3729 3730 void TLan_SetMac( struct net_device *dev, int areg, char *mac ) 3731 { 3732 int i; 3733 3734 areg *= 6; 3735 3736 if ( mac != NULL ) { 3737 for ( i = 0; i < 6; i++ ) 3738 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] ); 3739 } else { 3740 for ( i = 0; i < 6; i++ ) 3741 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 ); 3742 } 3743 3744 } /* TLan_SetMac */ 3745 3746 #endif 3747
