1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 2 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=pic -mtriple=arm-apple-ios | FileCheck %s --check-prefix=ARM 3 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARMv7 4 5 @g = global i32 0, align 4 6 7 define i32 @LoadGV() { 8 entry: 9 ; THUMB: LoadGV 10 ; THUMB: movw [[reg0:r[0-9]+]], 11 ; THUMB: movt [[reg0]], 12 ; THUMB: add [[reg0]], pc 13 ; ARM: LoadGV 14 ; ARM: ldr [[reg1:r[0-9]+]], 15 ; ARM: add [[reg1]], pc, [[reg1]] 16 ; ARMv7: LoadGV 17 ; ARMv7: movw [[reg2:r[0-9]+]], 18 ; ARMv7: movt [[reg2]], 19 ; ARMv7: add [[reg2]], pc, [[reg2]] 20 %tmp = load i32* @g 21 ret i32 %tmp 22 } 23 24 @i = external global i32 25 26 define i32 @LoadIndirectSymbol() { 27 entry: 28 ; THUMB: LoadIndirectSymbol 29 ; THUMB: movw r[[reg3:[0-9]+]], 30 ; THUMB: movt r[[reg3]], 31 ; THUMB: add r[[reg3]], pc 32 ; THUMB: ldr r[[reg3]], [r[[reg3]]] 33 ; ARM: LoadIndirectSymbol 34 ; ARM: ldr [[reg4:r[0-9]+]], 35 ; ARM: ldr [[reg4]], [pc, [[reg4]]] 36 ; ARMv7: LoadIndirectSymbol 37 ; ARMv7: movw r[[reg5:[0-9]+]], 38 ; ARMv7: movt r[[reg5]], 39 ; ARMv7: add r[[reg5]], pc, r[[reg5]] 40 ; ARMv7: ldr r[[reg5]], [r[[reg5]]] 41 %tmp = load i32* @i 42 ret i32 %tmp 43 } 44
