1 ; RUN: llc < %s -march=cellspu | FileCheck %s 2 3 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" 4 target triple = "spu" 5 6 ; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2 7 ; $3 = %arg1, $4 = %val1, $5 = %val2 8 ; 9 ; For "positive" comparisons: 10 ; selb $3, $6, $5, <i1> 11 ; selb $3, $5, $4, <i1> 12 ; 13 ; For "negative" comparisons, i.e., those where the result of the comparison 14 ; must be inverted (setne, for example): 15 ; selb $3, $5, $6, <i1> 16 ; selb $3, $4, $5, <i1> 17 18 ; i32 integer comparisons: 19 define i32 @icmp_eq_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 20 ; CHECK: icmp_eq_select_i32: 21 ; CHECK: ceq 22 ; CHECK: selb $3, $6, $5, $3 23 24 entry: 25 %A = icmp eq i32 %arg1, %arg2 26 %B = select i1 %A, i32 %val1, i32 %val2 27 ret i32 %B 28 } 29 30 define i1 @icmp_eq_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 31 ; CHECK: icmp_eq_setcc_i32: 32 ; CHECK: ilhu 33 ; CHECK: ceq 34 ; CHECK: iohl 35 ; CHECK: shufb 36 37 entry: 38 %A = icmp eq i32 %arg1, %arg2 39 ret i1 %A 40 } 41 42 define i32 @icmp_eq_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 43 ; CHECK: icmp_eq_immed01_i32: 44 ; CHECK: ceqi 45 ; CHECK: selb $3, $5, $4, $3 46 47 entry: 48 %A = icmp eq i32 %arg1, 511 49 %B = select i1 %A, i32 %val1, i32 %val2 50 ret i32 %B 51 } 52 53 define i32 @icmp_eq_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 54 ; CHECK: icmp_eq_immed02_i32: 55 ; CHECK: ceqi 56 ; CHECK: selb $3, $5, $4, $3 57 58 entry: 59 %A = icmp eq i32 %arg1, -512 60 %B = select i1 %A, i32 %val1, i32 %val2 61 ret i32 %B 62 } 63 64 define i32 @icmp_eq_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 65 ; CHECK: icmp_eq_immed03_i32: 66 ; CHECK: ceqi 67 ; CHECK: selb $3, $5, $4, $3 68 69 entry: 70 %A = icmp eq i32 %arg1, -1 71 %B = select i1 %A, i32 %val1, i32 %val2 72 ret i32 %B 73 } 74 75 define i32 @icmp_eq_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 76 ; CHECK: icmp_eq_immed04_i32: 77 ; CHECK: ila 78 ; CHECK: ceq 79 ; CHECK: selb $3, $5, $4, $3 80 81 entry: 82 %A = icmp eq i32 %arg1, 32768 83 %B = select i1 %A, i32 %val1, i32 %val2 84 ret i32 %B 85 } 86 87 define i32 @icmp_ne_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 88 ; CHECK: icmp_ne_select_i32: 89 ; CHECK: ceq 90 ; CHECK: selb $3, $5, $6, $3 91 92 entry: 93 %A = icmp ne i32 %arg1, %arg2 94 %B = select i1 %A, i32 %val1, i32 %val2 95 ret i32 %B 96 } 97 98 define i1 @icmp_ne_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 99 ; CHECK: icmp_ne_setcc_i32: 100 ; CHECK: ceq 101 ; CHECK: ilhu 102 ; CHECK: xori 103 ; CHECK: iohl 104 ; CHECK: shufb 105 106 entry: 107 %A = icmp ne i32 %arg1, %arg2 108 ret i1 %A 109 } 110 111 define i32 @icmp_ne_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 112 ; CHECK: icmp_ne_immed01_i32: 113 ; CHECK: ceqi 114 ; CHECK: selb $3, $4, $5, $3 115 116 entry: 117 %A = icmp ne i32 %arg1, 511 118 %B = select i1 %A, i32 %val1, i32 %val2 119 ret i32 %B 120 } 121 122 define i32 @icmp_ne_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 123 ; CHECK: icmp_ne_immed02_i32: 124 ; CHECK: ceqi 125 ; CHECK: selb $3, $4, $5, $3 126 127 entry: 128 %A = icmp ne i32 %arg1, -512 129 %B = select i1 %A, i32 %val1, i32 %val2 130 ret i32 %B 131 } 132 133 define i32 @icmp_ne_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 134 ; CHECK: icmp_ne_immed03_i32: 135 ; CHECK: ceqi 136 ; CHECK: selb $3, $4, $5, $3 137 138 entry: 139 %A = icmp ne i32 %arg1, -1 140 %B = select i1 %A, i32 %val1, i32 %val2 141 ret i32 %B 142 } 143 144 define i32 @icmp_ne_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 145 ; CHECK: icmp_ne_immed04_i32: 146 ; CHECK: ila 147 ; CHECK: ceq 148 ; CHECK: selb $3, $4, $5, $3 149 150 entry: 151 %A = icmp ne i32 %arg1, 32768 152 %B = select i1 %A, i32 %val1, i32 %val2 153 ret i32 %B 154 } 155 156 define i32 @icmp_ugt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 157 ; CHECK: icmp_ugt_select_i32: 158 ; CHECK: clgt 159 ; CHECK: selb $3, $6, $5, $3 160 161 entry: 162 %A = icmp ugt i32 %arg1, %arg2 163 %B = select i1 %A, i32 %val1, i32 %val2 164 ret i32 %B 165 } 166 167 define i1 @icmp_ugt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 168 ; CHECK: icmp_ugt_setcc_i32: 169 ; CHECK: ilhu 170 ; CHECK: clgt 171 ; CHECK: iohl 172 ; CHECK: shufb 173 174 entry: 175 %A = icmp ugt i32 %arg1, %arg2 176 ret i1 %A 177 } 178 179 define i32 @icmp_ugt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 180 ; CHECK: icmp_ugt_immed01_i32: 181 ; CHECK: clgti 182 ; CHECK: selb $3, $5, $4, $3 183 184 entry: 185 %A = icmp ugt i32 %arg1, 511 186 %B = select i1 %A, i32 %val1, i32 %val2 187 ret i32 %B 188 } 189 190 define i32 @icmp_ugt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 191 ; CHECK: icmp_ugt_immed02_i32: 192 ; CHECK: clgti 193 ; CHECK: selb $3, $5, $4, $3 194 195 entry: 196 %A = icmp ugt i32 %arg1, 4294966784 197 %B = select i1 %A, i32 %val1, i32 %val2 198 ret i32 %B 199 } 200 201 define i32 @icmp_ugt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 202 ; CHECK: icmp_ugt_immed03_i32: 203 ; CHECK: clgti 204 ; CHECK: selb $3, $5, $4, $3 205 206 entry: 207 %A = icmp ugt i32 %arg1, 4294967293 208 %B = select i1 %A, i32 %val1, i32 %val2 209 ret i32 %B 210 } 211 212 define i32 @icmp_ugt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 213 ; CHECK: icmp_ugt_immed04_i32: 214 ; CHECK: ila 215 ; CHECK: clgt 216 ; CHECK: selb $3, $5, $4, $3 217 218 entry: 219 %A = icmp ugt i32 %arg1, 32768 220 %B = select i1 %A, i32 %val1, i32 %val2 221 ret i32 %B 222 } 223 224 define i32 @icmp_uge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 225 ; CHECK: icmp_uge_select_i32: 226 ; CHECK: ceq 227 ; CHECK: clgt 228 ; CHECK: or 229 ; CHECK: selb $3, $6, $5, $3 230 231 entry: 232 %A = icmp uge i32 %arg1, %arg2 233 %B = select i1 %A, i32 %val1, i32 %val2 234 ret i32 %B 235 } 236 237 define i1 @icmp_uge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 238 ; CHECK: icmp_uge_setcc_i32: 239 ; CHECK: ceq 240 ; CHECK: clgt 241 ; CHECK: ilhu 242 ; CHECK: or 243 ; CHECK: iohl 244 ; CHECK: shufb 245 246 entry: 247 %A = icmp uge i32 %arg1, %arg2 248 ret i1 %A 249 } 250 251 ;; Note: icmp uge i32 %arg1, <immed> can always be transformed into 252 ;; icmp ugt i32 %arg1, <immed>-1 253 ;; 254 ;; Consequently, even though the patterns exist to match, it's unlikely 255 ;; they'll ever be generated. 256 257 define i32 @icmp_ult_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 258 ; CHECK: icmp_ult_select_i32: 259 ; CHECK: ceq 260 ; CHECK: clgt 261 ; CHECK: nor 262 ; CHECK: selb $3, $6, $5, $3 263 264 entry: 265 %A = icmp ult i32 %arg1, %arg2 266 %B = select i1 %A, i32 %val1, i32 %val2 267 ret i32 %B 268 } 269 270 define i1 @icmp_ult_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 271 ; CHECK: icmp_ult_setcc_i32: 272 ; CHECK: ceq 273 ; CHECK: clgt 274 ; CHECK: ilhu 275 ; CHECK: nor 276 ; CHECK: iohl 277 ; CHECK: shufb 278 279 entry: 280 %A = icmp ult i32 %arg1, %arg2 281 ret i1 %A 282 } 283 284 define i32 @icmp_ult_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 285 ; CHECK: icmp_ult_immed01_i32: 286 ; CHECK: ceqi 287 ; CHECK: clgti 288 ; CHECK: nor 289 ; CHECK: selb $3, $5, $4, $3 290 291 entry: 292 %A = icmp ult i32 %arg1, 511 293 %B = select i1 %A, i32 %val1, i32 %val2 294 ret i32 %B 295 } 296 297 define i32 @icmp_ult_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 298 ; CHECK: icmp_ult_immed02_i32: 299 ; CHECK: ceqi 300 ; CHECK: clgti 301 ; CHECK: nor 302 ; CHECK: selb $3, $5, $4, $3 303 304 entry: 305 %A = icmp ult i32 %arg1, 4294966784 306 %B = select i1 %A, i32 %val1, i32 %val2 307 ret i32 %B 308 } 309 310 define i32 @icmp_ult_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 311 ; CHECK: icmp_ult_immed03_i32: 312 ; CHECK: ceqi 313 ; CHECK: clgti 314 ; CHECK: nor 315 ; CHECK: selb $3, $5, $4, $3 316 317 entry: 318 %A = icmp ult i32 %arg1, 4294967293 319 %B = select i1 %A, i32 %val1, i32 %val2 320 ret i32 %B 321 } 322 323 define i32 @icmp_ult_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 324 ; CHECK: icmp_ult_immed04_i32: 325 ; CHECK: rotmi 326 ; CHECK: ceqi 327 ; CHECK: selb $3, $5, $4, $3 328 329 entry: 330 %A = icmp ult i32 %arg1, 32768 331 %B = select i1 %A, i32 %val1, i32 %val2 332 ret i32 %B 333 } 334 335 define i32 @icmp_ule_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 336 ; CHECK: icmp_ule_select_i32: 337 ; CHECK: clgt 338 ; CHECK: selb $3, $5, $6, $3 339 340 entry: 341 %A = icmp ule i32 %arg1, %arg2 342 %B = select i1 %A, i32 %val1, i32 %val2 343 ret i32 %B 344 } 345 346 define i1 @icmp_ule_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 347 ; CHECK: icmp_ule_setcc_i32: 348 ; CHECK: clgt 349 ; CHECK: ilhu 350 ; CHECK: xori 351 ; CHECK: iohl 352 ; CHECK: shufb 353 354 entry: 355 %A = icmp ule i32 %arg1, %arg2 356 ret i1 %A 357 } 358 359 ;; Note: icmp ule i32 %arg1, <immed> can always be transformed into 360 ;; icmp ult i32 %arg1, <immed>+1 361 ;; 362 ;; Consequently, even though the patterns exist to match, it's unlikely 363 ;; they'll ever be generated. 364 365 define i32 @icmp_sgt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 366 ; CHECK: icmp_sgt_select_i32: 367 ; CHECK: cgt 368 ; CHECK: selb $3, $6, $5, $3 369 370 entry: 371 %A = icmp sgt i32 %arg1, %arg2 372 %B = select i1 %A, i32 %val1, i32 %val2 373 ret i32 %B 374 } 375 376 define i1 @icmp_sgt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 377 ; CHECK: icmp_sgt_setcc_i32: 378 ; CHECK: ilhu 379 ; CHECK: cgt 380 ; CHECK: iohl 381 ; CHECK: shufb 382 383 entry: 384 %A = icmp sgt i32 %arg1, %arg2 385 ret i1 %A 386 } 387 388 define i32 @icmp_sgt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 389 ; CHECK: icmp_sgt_immed01_i32: 390 ; CHECK: cgti 391 ; CHECK: selb $3, $5, $4, $3 392 393 entry: 394 %A = icmp sgt i32 %arg1, 511 395 %B = select i1 %A, i32 %val1, i32 %val2 396 ret i32 %B 397 } 398 399 define i32 @icmp_sgt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 400 ; CHECK: icmp_sgt_immed02_i32: 401 ; CHECK: cgti 402 ; CHECK: selb $3, $5, $4, $3 403 404 entry: 405 %A = icmp sgt i32 %arg1, 4294966784 406 %B = select i1 %A, i32 %val1, i32 %val2 407 ret i32 %B 408 } 409 410 define i32 @icmp_sgt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 411 ; CHECK: icmp_sgt_immed03_i32: 412 ; CHECK: cgti 413 ; CHECK: selb $3, $5, $4, $3 414 415 entry: 416 %A = icmp sgt i32 %arg1, 4294967293 417 %B = select i1 %A, i32 %val1, i32 %val2 418 ret i32 %B 419 } 420 421 define i32 @icmp_sgt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 422 ; CHECK: icmp_sgt_immed04_i32: 423 ; CHECK: ila 424 ; CHECK: cgt 425 ; CHECK: selb $3, $5, $4, $3 426 427 entry: 428 %A = icmp sgt i32 %arg1, 32768 429 %B = select i1 %A, i32 %val1, i32 %val2 430 ret i32 %B 431 } 432 433 define i32 @icmp_sge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 434 ; CHECK: icmp_sge_select_i32: 435 ; CHECK: ceq 436 ; CHECK: cgt 437 ; CHECK: or 438 ; CHECK: selb $3, $6, $5, $3 439 440 entry: 441 %A = icmp sge i32 %arg1, %arg2 442 %B = select i1 %A, i32 %val1, i32 %val2 443 ret i32 %B 444 } 445 446 define i1 @icmp_sge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 447 ; CHECK: icmp_sge_setcc_i32: 448 ; CHECK: ceq 449 ; CHECK: cgt 450 ; CHECK: ilhu 451 ; CHECK: or 452 ; CHECK: iohl 453 ; CHECK: shufb 454 455 entry: 456 %A = icmp sge i32 %arg1, %arg2 457 ret i1 %A 458 } 459 460 ;; Note: icmp sge i32 %arg1, <immed> can always be transformed into 461 ;; icmp sgt i32 %arg1, <immed>-1 462 ;; 463 ;; Consequently, even though the patterns exist to match, it's unlikely 464 ;; they'll ever be generated. 465 466 define i32 @icmp_slt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 467 ; CHECK: icmp_slt_select_i32: 468 ; CHECK: ceq 469 ; CHECK: cgt 470 ; CHECK: nor 471 ; CHECK: selb $3, $6, $5, $3 472 473 entry: 474 %A = icmp slt i32 %arg1, %arg2 475 %B = select i1 %A, i32 %val1, i32 %val2 476 ret i32 %B 477 } 478 479 define i1 @icmp_slt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 480 ; CHECK: icmp_slt_setcc_i32: 481 ; CHECK: ceq 482 ; CHECK: cgt 483 ; CHECK: ilhu 484 ; CHECK: nor 485 ; CHECK: iohl 486 ; CHECK: shufb 487 488 entry: 489 %A = icmp slt i32 %arg1, %arg2 490 ret i1 %A 491 } 492 493 define i32 @icmp_slt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 494 ; CHECK: icmp_slt_immed01_i32: 495 ; CHECK: ceqi 496 ; CHECK: cgti 497 ; CHECK: nor 498 ; CHECK: selb $3, $5, $4, $3 499 500 entry: 501 %A = icmp slt i32 %arg1, 511 502 %B = select i1 %A, i32 %val1, i32 %val2 503 ret i32 %B 504 } 505 506 define i32 @icmp_slt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 507 ; CHECK: icmp_slt_immed02_i32: 508 ; CHECK: ceqi 509 ; CHECK: cgti 510 ; CHECK: nor 511 ; CHECK: selb $3, $5, $4, $3 512 513 entry: 514 %A = icmp slt i32 %arg1, -512 515 %B = select i1 %A, i32 %val1, i32 %val2 516 ret i32 %B 517 } 518 519 define i32 @icmp_slt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 520 ; CHECK: icmp_slt_immed03_i32: 521 ; CHECK: ceqi 522 ; CHECK: cgti 523 ; CHECK: nor 524 ; CHECK: selb $3, $5, $4, $3 525 526 entry: 527 %A = icmp slt i32 %arg1, -1 528 %B = select i1 %A, i32 %val1, i32 %val2 529 ret i32 %B 530 } 531 532 define i32 @icmp_slt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 533 ; CHECK: icmp_slt_immed04_i32: 534 ; CHECK: ila 535 ; CHECK: ceq 536 ; CHECK: cgt 537 ; CHECK: nor 538 ; CHECK: selb $3, $5, $4, $3 539 540 entry: 541 %A = icmp slt i32 %arg1, 32768 542 %B = select i1 %A, i32 %val1, i32 %val2 543 ret i32 %B 544 } 545 546 define i32 @icmp_sle_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 547 ; CHECK: icmp_sle_select_i32: 548 ; CHECK: cgt 549 ; CHECK: selb $3, $5, $6, $3 550 551 entry: 552 %A = icmp sle i32 %arg1, %arg2 553 %B = select i1 %A, i32 %val1, i32 %val2 554 ret i32 %B 555 } 556 557 define i1 @icmp_sle_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 558 ; CHECK: icmp_sle_setcc_i32: 559 ; CHECK: cgt 560 ; CHECK: ilhu 561 ; CHECK: xori 562 ; CHECK: iohl 563 ; CHECK: shufb 564 565 entry: 566 %A = icmp sle i32 %arg1, %arg2 567 ret i1 %A 568 } 569 570 ;; Note: icmp sle i32 %arg1, <immed> can always be transformed into 571 ;; icmp slt i32 %arg1, <immed>+1 572 ;; 573 ;; Consequently, even though the patterns exist to match, it's unlikely 574 ;; they'll ever be generated. 575 576