1 ; RUN: llc -O1 --march=cellspu < %s | FileCheck %s 2 3 ;CHECK: shuffle 4 define <4 x float> @shuffle(<4 x float> %param1, <4 x float> %param2) { 5 ; CHECK: cwd {{\$.}}, 0($sp) 6 ; CHECK: shufb {{\$., \$4, \$3, \$.}} 7 %val= shufflevector <4 x float> %param1, <4 x float> %param2, <4 x i32> <i32 4,i32 1,i32 2,i32 3> 8 ret <4 x float> %val 9 } 10 11 ;CHECK: splat 12 define <4 x float> @splat(float %param1) { 13 ; CHECK: lqa 14 ; CHECK: shufb $3 15 ; CHECK: bi 16 %vec = insertelement <1 x float> undef, float %param1, i32 0 17 %val= shufflevector <1 x float> %vec, <1 x float> undef, <4 x i32> <i32 0,i32 0,i32 0,i32 0> 18 ret <4 x float> %val 19 } 20 21 ;CHECK: test_insert 22 define void @test_insert( <2 x float>* %ptr, float %val1, float %val2 ) { 23 %sl2_17_tmp1 = insertelement <2 x float> zeroinitializer, float %val1, i32 0 24 ;CHECK: lqa $6, 25 ;CHECK: shufb $4, $4, $5, $6 26 %sl2_17 = insertelement <2 x float> %sl2_17_tmp1, float %val2, i32 1 27 28 ;CHECK: cdd $5, 0($3) 29 ;CHECK: lqd $6, 0($3) 30 ;CHECK: shufb $4, $4, $6, $5 31 ;CHECK: stqd $4, 0($3) 32 ;CHECK: bi $lr 33 store <2 x float> %sl2_17, <2 x float>* %ptr 34 ret void 35 } 36 37 ;CHECK: test_insert_1 38 define <4 x float> @test_insert_1(<4 x float> %vparam, float %eltparam) { 39 ;CHECK: cwd $5, 4($sp) 40 ;CHECK: shufb $3, $4, $3, $5 41 ;CHECK: bi $lr 42 %rv = insertelement <4 x float> %vparam, float %eltparam, i32 1 43 ret <4 x float> %rv 44 } 45 46 ;CHECK: test_v2i32 47 define <2 x i32> @test_v2i32(<4 x i32>%vec) 48 { 49 ;CHECK: rotqbyi $3, $3, 4 50 ;CHECK: bi $lr 51 %rv = shufflevector <4 x i32> %vec, <4 x i32> undef, <2 x i32><i32 1,i32 2> 52 ret <2 x i32> %rv 53 } 54 55 define <4 x i32> @test_v4i32_rot8(<4 x i32>%vec) 56 { 57 %rv = shufflevector <4 x i32> %vec, <4 x i32> undef, 58 <4 x i32> <i32 2,i32 3,i32 0, i32 1> 59 ret <4 x i32> %rv 60 } 61 62 ;CHECK: test_v4i32_rot4 63 define <4 x i32> @test_v4i32_rot4(<4 x i32>%vec) 64 { 65 %rv = shufflevector <4 x i32> %vec, <4 x i32> undef, 66 <4 x i32> <i32 1,i32 2,i32 3, i32 0> 67 ret <4 x i32> %rv 68 } 69 70