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      1 ; RUN: llc -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs < %s
      2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
      3 target triple = "x86_64-apple-darwin"
      4 
      5 ; This test causes a virtual FP register to be redefined while it is live:
      6 ;BB#5: derived from LLVM BB %bb10
      7 ;    Predecessors according to CFG: BB#4 BB#5
      8 ;	%reg1024<def> = MOV_Fp8080 %reg1034
      9 ;	%reg1025<def> = MUL_Fp80m32 %reg1024, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
     10 ;	%reg1034<def> = MOV_Fp8080 %reg1025
     11 ;	FP_REG_KILL %FP0<imp-def>, %FP1<imp-def>, %FP2<imp-def>, %FP3<imp-def>, %FP4<imp-def>, %FP5<imp-def>, %FP6<imp-def>
     12 ;	JMP_4 <BB#5>
     13 ;    Successors according to CFG: BB#5
     14 ;
     15 ; The X86FP pass needs good kill flags, like on %FP0 representing %reg1034:
     16 ;BB#5: derived from LLVM BB %bb10
     17 ;    Predecessors according to CFG: BB#4 BB#5
     18 ;	%FP0<def> = LD_Fp80m <fi#3>, 1, %reg0, 0, %reg0; mem:LD10[FixedStack3](align=4)
     19 ;	%FP1<def> = MOV_Fp8080 %FP0<kill>
     20 ;	%FP2<def> = MUL_Fp80m32 %FP1, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
     21 ;	%FP0<def> = MOV_Fp8080 %FP2
     22 ;	ST_FpP80m <fi#3>, 1, %reg0, 0, %reg0, %FP0<kill>; mem:ST10[FixedStack3](align=4)
     23 ;	ST_FpP80m <fi#4>, 1, %reg0, 0, %reg0, %FP1<kill>; mem:ST10[FixedStack4](align=4)
     24 ;	ST_FpP80m <fi#5>, 1, %reg0, 0, %reg0, %FP2<kill>; mem:ST10[FixedStack5](align=4)
     25 ;	FP_REG_KILL %FP0<imp-def>, %FP1<imp-def>, %FP2<imp-def>, %FP3<imp-def>, %FP4<imp-def>, %FP5<imp-def>, %FP6<imp-def>
     26 ;	JMP_4 <BB#5>
     27 ;    Successors according to CFG: BB#5
     28 
     29 define fastcc i32 @sqlite3AtoF(i8* %z, double* nocapture %pResult) nounwind ssp {
     30 entry:
     31   br i1 undef, label %bb2, label %bb1.i.i
     32 
     33 bb1.i.i:                                          ; preds = %entry
     34   unreachable
     35 
     36 bb2:                                              ; preds = %entry
     37   br i1 undef, label %isdigit339.exit11.preheader, label %bb13
     38 
     39 isdigit339.exit11.preheader:                      ; preds = %bb2
     40   br i1 undef, label %bb12, label %bb10
     41 
     42 bb10:                                             ; preds = %bb10, %isdigit339.exit11.preheader
     43   %divisor.041 = phi x86_fp80 [ %0, %bb10 ], [ 0xK3FFF8000000000000000, %isdigit339.exit11.preheader ] ; <x86_fp80> [#uses=1]
     44   %0 = fmul x86_fp80 %divisor.041, 0xK4002A000000000000000 ; <x86_fp80> [#uses=2]
     45   br i1 false, label %bb12, label %bb10
     46 
     47 bb12:                                             ; preds = %bb10, %isdigit339.exit11.preheader
     48   %divisor.0.lcssa = phi x86_fp80 [ 0xK3FFF8000000000000000, %isdigit339.exit11.preheader ], [ %0, %bb10 ] ; <x86_fp80> [#uses=0]
     49   br label %bb13
     50 
     51 bb13:                                             ; preds = %bb12, %bb2
     52   br i1 undef, label %bb34, label %bb36
     53 
     54 bb34:                                             ; preds = %bb13
     55   br label %bb36
     56 
     57 bb36:                                             ; preds = %bb34, %bb13
     58   ret i32 undef
     59 }
     60