1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s 2 3 @x = common global <8 x float> zeroinitializer, align 32 4 @y = common global <4 x double> zeroinitializer, align 32 5 @z = common global <4 x float> zeroinitializer, align 16 6 7 define void @zero128() nounwind ssp { 8 entry: 9 ; CHECK: vxorps 10 ; CHECK: vmovaps 11 store <4 x float> zeroinitializer, <4 x float>* @z, align 16 12 ret void 13 } 14 15 define void @zero256() nounwind ssp { 16 entry: 17 ; CHECK: vxorps 18 ; CHECK: vmovaps 19 ; CHECK: vmovaps 20 store <8 x float> zeroinitializer, <8 x float>* @x, align 32 21 store <4 x double> zeroinitializer, <4 x double>* @y, align 32 22 ret void 23 } 24 25 ; CHECK: vpcmpeqd 26 ; CHECK: vinsertf128 $1 27 define void @ones([0 x float]* nocapture %RET, [0 x float]* nocapture %aFOO) nounwind { 28 allocas: 29 %ptr2vec615 = bitcast [0 x float]* %RET to <8 x float>* 30 store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 31 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 32 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <8 x 33 float>* %ptr2vec615, align 32 34 ret void 35 } 36 37 ; CHECK: vpcmpeqd 38 ; CHECK: vinsertf128 $1 39 define void @ones2([0 x i32]* nocapture %RET, [0 x i32]* nocapture %aFOO) nounwind { 40 allocas: 41 %ptr2vec615 = bitcast [0 x i32]* %RET to <8 x i32>* 42 store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32>* %ptr2vec615, align 32 43 ret void 44 } 45 46 ;;; Just make sure this doesn't crash 47 ; CHECK: _ISelCrash 48 define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp { 49 entry: 50 %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4> 51 ret <4 x i64> %shuffle 52 } 53 54 ;;; 55 ;;; Check that some 256-bit vectors are xformed into 128 ops 56 ; CHECK: _A 57 ; CHECK: vshufpd $1 58 ; CHECK-NEXT: vextractf128 $1 59 ; CHECK-NEXT: vshufpd $1 60 ; CHECK-NEXT: vinsertf128 $1 61 define <4 x i64> @A(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 62 entry: 63 %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 0, i32 7, i32 6> 64 ret <4 x i64> %shuffle 65 } 66 67 ; CHECK: _B 68 ; CHECK: vshufpd $1, %ymm 69 define <4 x i64> @B(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 70 entry: 71 %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 undef, i32 undef, i32 6> 72 ret <4 x i64> %shuffle 73 } 74 75 ; CHECK: movlhps 76 ; CHECK-NEXT: vextractf128 $1 77 ; CHECK-NEXT: movlhps 78 ; CHECK-NEXT: vinsertf128 $1 79 define <4 x i64> @C(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { 80 entry: 81 %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 undef, i32 0, i32 undef, i32 6> 82 ret <4 x i64> %shuffle 83 } 84 85 ; CHECK: vpshufd $-96 86 ; CHECK: vpshufd $-6 87 ; CHECK: vinsertf128 $1 88 define <8 x i32> @D(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp { 89 entry: 90 %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 10, i32 10, i32 11, i32 11> 91 ret <8 x i32> %shuffle 92 } 93 94 ;;; Don't crash on movd 95 ; CHECK: _VMOVZQI2PQI 96 ; CHECK: vmovd (% 97 define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind { 98 allocas: 99 %ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32* 100 %val.i34.i = load i32* %ptrcast.i33.i, align 4 101 %ptroffset.i22.i992 = getelementptr [0 x float]* %aFOO, i64 0, i64 1 102 %ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32* 103 %val.i24.i = load i32* %ptrcast.i23.i, align 4 104 %updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1 105 ret <8 x i32> %updatedret.i30.i 106 } 107 108 ;;;; Don't crash on fneg 109 ; rdar://10566486 110 ; CHECK: fneg 111 ; CHECK: vxorps 112 define <16 x float> @fneg(<16 x float> %a) nounwind { 113 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a 114 ret <16 x float> %1 115 } 116 117 ;;; Don't crash on build vector 118 ; CHECK: @build_vec_16x16 119 ; CHECK: vmovd 120 define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly { 121 %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0 122 ret <16 x i16> %res 123 } 124
