1 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse41,-avx < %s | FileCheck %s --check-prefix SSE41 2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix AVX 3 4 define i32 @veccond(<4 x i32> %input) { 5 entry: 6 %0 = bitcast <4 x i32> %input to i128 7 %1 = icmp ne i128 %0, 0 8 br i1 %1, label %if-true-block, label %endif-block 9 10 if-true-block: ; preds = %entry 11 ret i32 0 12 endif-block: ; preds = %entry, 13 ret i32 1 14 ; SSE41: veccond 15 ; SSE41: ptest 16 ; SSE41: ret 17 ; AVX: veccond 18 ; AVX: vptest 19 ; AVX: ret 20 } 21 22 define i32 @vectest(<4 x i32> %input) { 23 entry: 24 %0 = bitcast <4 x i32> %input to i128 25 %1 = icmp ne i128 %0, 0 26 %2 = zext i1 %1 to i32 27 ret i32 %2 28 ; SSE41: vectest 29 ; SSE41: ptest 30 ; SSE41: ret 31 ; AVX: vectest 32 ; AVX: vptest 33 ; AVX: ret 34 } 35 36 define i32 @vecsel(<4 x i32> %input, i32 %a, i32 %b) { 37 entry: 38 %0 = bitcast <4 x i32> %input to i128 39 %1 = icmp ne i128 %0, 0 40 %2 = select i1 %1, i32 %a, i32 %b 41 ret i32 %2 42 ; SSE41: vecsel 43 ; SSE41: ptest 44 ; SSE41: ret 45 ; AVX: vecsel 46 ; AVX: vptest 47 ; AVX: ret 48 } 49
