Home | History | Annotate | Download | only in ARMV5E
      1 @/*
      2 @ ** Copyright 2003-2010, VisualOn, Inc.
      3 @ **
      4 @ ** Licensed under the Apache License, Version 2.0 (the "License");
      5 @ ** you may not use this file except in compliance with the License.
      6 @ ** You may obtain a copy of the License at
      7 @ **
      8 @ **     http://www.apache.org/licenses/LICENSE-2.0
      9 @ **
     10 @ ** Unless required by applicable law or agreed to in writing, software
     11 @ ** distributed under the License is distributed on an "AS IS" BASIS,
     12 @ ** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13 @ ** See the License for the specific language governing permissions and
     14 @ ** limitations under the License.
     15 @ */
     16 @
     17 @void Scale_sig(
     18 @	       Word16 x[],                           /* (i/o) : signal to scale               */
     19 @	       Word16 lg,                            /* (i)   : size of x[]                   */
     20 @	       Word16 exp                            /* (i)   : exponent: x = round(x << exp) */
     21 @	       )
     22 @
     23 @r0 --- x[]
     24 @r1 --- lg
     25 @r2 --- exp
     26 
     27           .section  .text
     28 	  .global   Scale_sig_opt
     29 
     30 Scale_sig_opt:
     31 
     32          STMFD         r13!, {r4 - r12, r14}
     33 	 SUB           r3, r1, #1                  @i = lg - 1
     34          CMP           r2, #0                      @Compare exp and 0
     35 	 RSB           r7, r2, #0                  @exp = -exp
     36 	 ADD           r10, r2, #16                @16 + exp
     37          ADD           r4, r0, r3, LSL #1          @x[i] address
     38 	 MOV           r8, #0x7fffffff
     39 	 MOV           r9, #0x8000
     40 	 BLE           LOOP2
     41 
     42 LOOP1:
     43 
     44          LDRSH          r5, [r4]                    @load x[i]
     45          MOV           r12, r5, LSL r10
     46 	 TEQ           r5, r12, ASR r10
     47 	 EORNE         r12, r8, r5, ASR #31
     48 	 SUBS          r3, r3, #1
     49 	 QADD          r11, r12, r9
     50 	 MOV           r12, r11, ASR #16
     51 	 STRH          r12, [r4], #-2
     52 	 BGE           LOOP1
     53          BL            The_end
     54 
     55 LOOP2:
     56 
     57          LDRSH          r5, [r4]                   @load x[i]
     58 	 MOV           r6, r5, LSL #16            @L_tmp = x[i] << 16
     59 	 MOV           r5, r6, ASR r7             @L_tmp >>= exp
     60 	 QADD          r11, r5, r9
     61 	 MOV           r12, r11, ASR #16
     62 	 SUBS          r3, r3, #1
     63 	 STRH          r12, [r4], #-2
     64 	 BGE           LOOP2
     65 
     66 The_end:
     67          LDMFD         r13!, {r4 - r12, r15}
     68 
     69          @ENDFUNC
     70          .END
     71 
     72 
     73 
     74 
     75 
     76