1 /* 2 * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved. 3 * 4 */ 5 6 .eabi_attribute 24, 1 7 .eabi_attribute 25, 1 8 9 .arm 10 .fpu neon 11 .text 12 13 .global armVCM4P10_InvTransformDequantLumaDC4x4 14 .func armVCM4P10_InvTransformDequantLumaDC4x4 15 armVCM4P10_InvTransformDequantLumaDC4x4: 16 PUSH {r4-r6,lr} 17 VPUSH {d8-d13} 18 VLD4.16 {d0,d1,d2,d3},[r0] 19 LDR r2, .LarmVCM4P10_QPDivTable 20 P0: ADD r2, pc 21 LDR r3, .LarmVCM4P10_VMatrixQPModTable 22 P1: ADD r3, pc 23 VADD.I16 d4,d0,d1 24 VADD.I16 d5,d2,d3 25 VSUB.I16 d6,d0,d1 26 LDRSB r4,[r2,r1] 27 VSUB.I16 d7,d2,d3 28 LDRSB r5,[r3,r1] 29 VADD.I16 d0,d4,d5 30 VSUB.I16 d1,d4,d5 31 VSUB.I16 d2,d6,d7 32 LSL r5,r5,r4 33 VADD.I16 d3,d6,d7 34 VTRN.16 d0,d1 35 VTRN.16 d2,d3 36 VTRN.32 q0,q1 37 VADD.I16 d4,d0,d1 38 VADD.I16 d5,d2,d3 39 VSUB.I16 d6,d0,d1 40 VSUB.I16 d7,d2,d3 41 VADD.I16 d0,d4,d5 42 VSUB.I16 d1,d4,d5 43 VSUB.I16 d2,d6,d7 44 VADD.I16 d3,d6,d7 45 VDUP.16 d5,r5 46 VMOV.I32 q3,#0x2 47 VMOV.I32 q4,#0x2 48 VMOV.I32 q5,#0x2 49 VMOV.I32 q6,#0x2 50 VMLAL.S16 q3,d0,d5 51 VMLAL.S16 q4,d1,d5 52 VMLAL.S16 q5,d2,d5 53 VMLAL.S16 q6,d3,d5 54 VSHRN.I32 d0,q3,#2 55 VSHRN.I32 d1,q4,#2 56 VSHRN.I32 d2,q5,#2 57 VSHRN.I32 d3,q6,#2 58 VST1.16 {d0,d1,d2,d3},[r0] 59 VPOP {d8-d13} 60 POP {r4-r6,pc} 61 .endfunc 62 63 .LarmVCM4P10_QPDivTable: 64 .word armVCM4P10_QPDivTable-(P0+8) 65 .LarmVCM4P10_VMatrixQPModTable: 66 .word armVCM4P10_VMatrixQPModTable-(P1+8) 67 68 .global omxVCM4P10_TransformDequantLumaDCFromPair 69 .func omxVCM4P10_TransformDequantLumaDCFromPair 70 omxVCM4P10_TransformDequantLumaDCFromPair: 71 PUSH {r4-r6,lr} 72 MOV r4,r1 73 MOV r5,r2 74 BL armVCM4P10_UnpackBlock4x4 75 MOV r0,r4 76 MOV r1,r5 77 BL armVCM4P10_InvTransformDequantLumaDC4x4 78 MOV r0,#0 79 POP {r4-r6,pc} 80 .endfunc 81 82 .end 83 84
