1 /* 2 * fwDebug.c 3 * 4 * Copyright(c) 1998 - 2009 Texas Instruments. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name Texas Instruments nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 35 36 /** \file FWDebug.c 37 * 38 * \see FWDebug.h 39 */ 40 41 #define __FILE_ID__ FILE_ID_103 42 #include "tidef.h" 43 #include "fwDebug_api.h" 44 #include "osApi.h" 45 #include "report.h" 46 #include "BusDrv.h" 47 #include "TwIf.h" 48 49 50 51 #define DMA_SIZE_BUF 256 52 53 typedef struct 54 { 55 TI_HANDLE hOs; 56 TI_HANDLE hReport; 57 TI_HANDLE hTwif; 58 59 TFwDubCallback fCb; 60 TI_HANDLE hCb; 61 62 TI_UINT8* pReadBuf; 63 64 TTxnStruct tTxn; 65 TI_UINT8* pDMABuf; 66 67 }TFwDebug; 68 69 /* Local functions */ 70 static void fwDbg_WriteAddrCb (TI_HANDLE hFwDebug,TTxnStruct* pTxn); 71 static void fwDbg_ReadAddrCb (TI_HANDLE hFwDebug,TTxnStruct* pTxn); 72 73 74 75 /* 76 * \brief Create the FW Debug module 77 * 78 * \param hOs - Handle to OS 79 * \return The created object 80 * 81 * \par Description 82 * This function will allocate memory to FW Debug module. 83 * 84 * \sa 85 */ 86 TI_HANDLE fwDbg_Create (TI_HANDLE hOs) 87 { 88 TFwDebug *pFwDebug = (TFwDebug *)os_memoryAlloc(hOs,sizeof(TFwDebug)); 89 90 if (pFwDebug == NULL) 91 { 92 WLAN_OS_REPORT (("FATAL ERROR: fwDbg_Create(): Error Creating TFwDebug - Aborting\n")); 93 return NULL; 94 } 95 96 /* reset module object */ 97 os_memoryZero (hOs, pFwDebug, sizeof (TFwDebug)); 98 pFwDebug->hOs = hOs; 99 100 return pFwDebug; 101 } 102 103 104 /* 105 * \brief Initialize the module 106 * 107 * \param hFwDebug - Handle to FW Debug 108 * \param hReport - Handle to report 109 * \param hTwif - Handle to TWIF 110 * \return none 111 * 112 * \par Description 113 * 114 * 115 * \sa 116 */ 117 void fwDbg_Init (TI_HANDLE hFwDebug, 118 TI_HANDLE hReport, 119 TI_HANDLE hTwif) 120 { 121 TFwDebug* pFwDebug = (TFwDebug*)hFwDebug; 122 pFwDebug->hReport = hReport; 123 pFwDebug->hTwif = hTwif; 124 125 /* Allocate DMA memory for read write transact */ 126 pFwDebug->pDMABuf = (TI_UINT8*)os_memoryAlloc(pFwDebug->hOs,DMA_SIZE_BUF); 127 } 128 129 130 /* 131 * \brief Destroy the object 132 * 133 * \param hFwDebug - Handle to FW Debug 134 * \return none 135 * 136 * \par Description 137 * Deallocate the object memory 138 * 139 * \sa 140 */ 141 void fwDbg_Destroy (TI_HANDLE hFwDebug) 142 { 143 TFwDebug* pFwDebug = (TFwDebug*)hFwDebug; 144 145 if (pFwDebug) 146 { 147 if (pFwDebug->pDMABuf) 148 { 149 os_memoryFree(pFwDebug->hOs,pFwDebug->pDMABuf,DMA_SIZE_BUF); 150 } 151 os_memoryFree(pFwDebug->hOs,pFwDebug,sizeof(pFwDebug)); 152 } 153 } 154 155 156 /* 157 * \brief Write Address to FW 158 * 159 * \param hFwDebug - Handle to FW Debug 160 * \param Address - Absolute HW address 161 * \param Length - Length in byte to write 162 * \param Buffer - Buffer to copy to FW 163 * \param fCb - CB function 164 * \param hCb - CB Handle 165 * \return none 166 * 167 * \par Description 168 * Write buffer to HW must receive length in byte max size 256 bytes 169 * address must be absolute HW address. 170 * 171 * \sa 172 */ 173 TI_STATUS fwDbg_WriteAddr (TI_HANDLE hFwDebug, 174 TI_UINT32 Address, 175 TI_UINT32 Length, 176 TI_UINT8* Buffer, 177 TFwDubCallback fCb, 178 TI_HANDLE hCb) 179 { 180 TI_STATUS rc; 181 TTxnStruct *pTxn; 182 TFwDebug* pFwDebug = (TFwDebug*)hFwDebug; 183 184 pTxn = &pFwDebug->tTxn; 185 186 /* check if length is large than default threshold */ 187 if (Length > DMA_SIZE_BUF) 188 { 189 TRACE1(pFwDebug->hOs, REPORT_SEVERITY_ERROR, "fwDbg_WriteAddr : Buffer Length too large -- %d",Length); 190 return TXN_STATUS_ERROR; 191 } 192 193 pFwDebug->fCb = fCb; 194 pFwDebug->hCb = hCb; 195 /* copy the given buffer to DMA buffer */ 196 os_memoryCopy(pFwDebug->hOs,pFwDebug->pDMABuf,Buffer,Length); 197 /* Build the command TxnStruct */ 198 TXN_PARAM_SET(pTxn, TXN_LOW_PRIORITY, TXN_FUNC_ID_WLAN, TXN_DIRECTION_WRITE, TXN_INC_ADDR) 199 /* Applying a CB in case of an async read */ 200 BUILD_TTxnStruct(pTxn, Address, pFwDebug->pDMABuf, Length,(TTxnDoneCb)fwDbg_WriteAddrCb, pFwDebug) 201 rc = twIf_Transact(pFwDebug->hTwif,pTxn); 202 203 return rc; 204 } 205 206 207 /* 208 * \brief Read Address to FW 209 * 210 * \param hFwDebug - Handle to FW Debug 211 * \param Address - Absolute HW address 212 * \param Length - Length in byte to write 213 * \param Buffer - Buffer to copy to FW 214 * \param fCb - CB function 215 * \param hCb - CB Handle 216 * \return none 217 * 218 * \par Description 219 * Read from HW, must receive length in byte max size 256 bytes 220 * address must be absolute HW address. 221 * 222 * \sa 223 */ 224 TI_STATUS fwDbg_ReadAddr (TI_HANDLE hFwDebug, 225 TI_UINT32 Address, 226 TI_UINT32 Length, 227 TI_UINT8* Buffer, 228 TFwDubCallback fCb, 229 TI_HANDLE hCb) 230 { 231 TI_STATUS rc; 232 TTxnStruct *pTxn; 233 TFwDebug *pFwDebug = (TFwDebug*)hFwDebug; 234 pTxn = &pFwDebug->tTxn; 235 /* check if length is large than default threshold */ 236 if (Length > DMA_SIZE_BUF) 237 { 238 TRACE1(pFwDebug->hOs, REPORT_SEVERITY_ERROR, "fwDbg_ReadAddr : Buffer Length too large -- %d",Length); 239 return TXN_STATUS_ERROR; 240 } 241 242 pFwDebug->fCb = fCb; 243 pFwDebug->hCb = hCb; 244 pFwDebug->pReadBuf = Buffer; 245 246 /* Build the command TxnStruct */ 247 TXN_PARAM_SET(pTxn, TXN_LOW_PRIORITY, TXN_FUNC_ID_WLAN, TXN_DIRECTION_READ, TXN_INC_ADDR) 248 /* Applying a CB in case of an async read */ 249 BUILD_TTxnStruct(pTxn, Address, pFwDebug->pDMABuf, Length,(TTxnDoneCb)fwDbg_ReadAddrCb, pFwDebug) 250 rc = twIf_Transact(pFwDebug->hTwif,pTxn); 251 if (rc == TXN_STATUS_COMPLETE) 252 { 253 /* copy from DMA buufer to given buffer */ 254 os_memoryCopy(pFwDebug->hOs,pFwDebug->pReadBuf,pFwDebug->pDMABuf,Length); 255 } 256 return rc; 257 } 258 259 260 /* 261 * \brief Write CB function 262 * 263 * \param hFwDebug - Handle to FW Debug 264 * \param pTxn - pointer ti Transact 265 * \return none 266 * 267 * \par Description 268 * This function called from TWIF upon Async Write 269 * 270 * \sa 271 */ 272 static void fwDbg_WriteAddrCb (TI_HANDLE hFwDebug,TTxnStruct* pTxn) 273 { 274 TFwDebug *pFwDebug = (TFwDebug*)hFwDebug; 275 276 if (pFwDebug->fCb && pFwDebug->hCb) 277 { 278 pFwDebug->fCb(pFwDebug->hCb); 279 } 280 } 281 282 283 /* 284 * \brief Read CB function 285 * 286 * \param hFwDebug - Handle to FW Debug 287 * \param pTxn - pointer ti Transact 288 * \return none 289 * 290 * \par Description 291 * This function called from TWIF upon Async Read 292 * 293 * \sa 294 */ 295 static void fwDbg_ReadAddrCb (TI_HANDLE hFwDebug,TTxnStruct* pTxn) 296 { 297 TFwDebug *pFwDebug = (TFwDebug*)hFwDebug; 298 /* copy from DMA buufer to given buffer */ 299 os_memoryCopy(pFwDebug->hOs,pFwDebug->pReadBuf,pFwDebug->pDMABuf,pTxn->aLen[0]); 300 301 if (pFwDebug->fCb && pFwDebug->hCb) 302 { 303 pFwDebug->fCb(pFwDebug->hCb); 304 } 305 } 306 307 308 /* 309 * \brief Check HW address 310 * 311 * \param hFwDebug - Handle to FW Debug 312 * \return TI_TRUE, TI_FALSE 313 * 314 * \par Description 315 * This function called to check the given address to be a valid memory address. 316 * 317 * \sa 318 */ 319 TI_BOOL fwDbg_isValidMemoryAddr (TI_HANDLE hFwDebug, TI_UINT32 Address, TI_UINT32 Length) 320 { 321 TFwDebug *pFwDebug = (TFwDebug*)hFwDebug; 322 323 return twIf_isValidMemoryAddr(pFwDebug->hTwif, Address, Length); 324 } 325 326 327 /* 328 * \brief Check HW address 329 * 330 * \param hFwDebug - Handle to FW Debug 331 * \return TI_TRUE, TI_FALSE 332 * 333 * \par Description 334 * This function called to check the given address to be a valid register address. 335 * 336 * \sa 337 */ 338 TI_BOOL fwDbg_isValidRegAddr (TI_HANDLE hFwDebug, TI_UINT32 Address, TI_UINT32 Length) 339 { 340 TFwDebug *pFwDebug = (TFwDebug*)hFwDebug; 341 342 return twIf_isValidRegAddr(pFwDebug->hTwif, Address, Length); 343 } 344 345
