Lines Matching refs:IsWrite
264 Value *Addr, uint32_t TypeSize, bool IsWrite,
269 bool IsWrite, size_t AccessSizeIndex,
274 Instruction *InsertBefore, bool IsWrite);
560 Value *Addr, Value *Size, Instruction *InsertBefore, bool IsWrite) {
565 instrumentAddress(OrigIns, InsertBefore, Addr, 8, IsWrite, Size);
571 instrumentAddress(OrigIns, InsertBefore, AddrLast, 8, IsWrite, Size);
601 // and set IsWrite. Otherwise return NULL.
602 static Value *isInterestingMemoryAccess(Instruction *I, bool *IsWrite) {
605 *IsWrite = false;
610 *IsWrite = true;
615 *IsWrite = true;
620 *IsWrite = true;
627 bool IsWrite = false;
628 Value *Addr = isInterestingMemoryAccess(I, &IsWrite);
655 return instrumentAddress(I, I, Addr, TypeSize, IsWrite, 0);
666 instrumentAddress(I, I, Addr, 8, IsWrite, Size);
667 instrumentAddress(I, I, LastByte, 8, IsWrite, Size);
683 bool IsWrite, size_t AccessSizeIndex, Value *SizeArgument) {
686 ? IRB.CreateCall2(AsanErrorCallbackSized[IsWrite], Addr, SizeArgument)
687 : IRB.CreateCall(AsanErrorCallback[IsWrite][AccessSizeIndex], Addr);
717 bool IsWrite, Value *SizeArgument) {
751 CrashTerm, AddrLong, IsWrite, AccessSizeIndex, SizeArgument);
1012 // IsWrite and TypeSize are encoded in the function name.
1121 bool IsWrite;
1131 if (Value *Addr = isInterestingMemoryAccess(BI, &IsWrite)) {
1161 if (isInterestingMemoryAccess(Inst, &IsWrite))
