| /external/clang/test/Sema/ |
| block-call.c | 3 int (*FP)();
7 int (*FPL) (int) = FP; // C doesn't consider this an error.
|
| /external/clang/test/SemaCXX/ |
| block-call.cpp | 3 int (*FP)();
7 int (*FPL) (int) = FP; // expected-error {{cannot initialize a variable of type 'int (*)(int)' with an lvalue of type 'int (*)()'}}
|
| explicit.cpp | 163 struct FP {
170 FP fp; local
172 fp(1);
|
| /external/libffi/src/sparc/ |
| v9.S | 135 #define FP %fp+STACK_BIAS
151 stx %i0, [FP+128+0]
152 stx %i1, [FP+128+8]
153 stx %i2, [FP+128+16]
154 stx %i3, [FP+128+24]
155 stx %i4, [FP+128+32]
156 stx %i5, [FP+128+40]
159 std %f0, [FP-128]
160 std %f2, [FP-120
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonExpandPredSpillCode.cpp | 80 unsigned FP = MI->getOperand(0).getReg();
81 assert(FP == QTM.getRegisterInfo()->getFrameRegister() &&
95 .addReg(FP).addReg(HEXAGON_RESERVED_REG_1);
104 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
118 addReg(FP).addImm(Offset).addReg(HEXAGON_RESERVED_REG_2);
127 unsigned FP = MI->getOperand(1).getReg();
128 assert(FP == QTM.getRegisterInfo()->getFrameRegister() &&
139 .addReg(FP)
149 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
159 HEXAGON_RESERVED_REG_2).addReg(FP).addImm(Offset)
[all...] |
| /ndk/sources/cxx-stl/llvm-libc++/src/ |
| chrono.cpp | 88 typedef steady_clock::rep (*FP)();
91 FP
106 static FP fp = init_steady_clock(); variable
107 return time_point(duration(fp()));
|
| /external/clang/test/CodeGen/ |
| pointer-arithmetic.c | 10 typedef void (*FP)(void);
18 FP f5(FP a, int b) { return a + b; }
19 FP f5_1(FP a, int b) { return (a += b); }
20 FP f6(int a, FP b) { return a + b; }
21 FP f6_1(int a, FP b) { return (a += b); }
22 FP f7(FP a, int b) { return a - b;
[all...] |
| struct-init.c | 37 void (*FP)(struct fp_struct_bar);
|
| /external/openssl/crypto/des/ |
| des_locl.h | 363 /* IP and FP
394 Thanks for hints from Richard Outerbridge - he told me IP&FP
414 #define FP(l,r) \
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 150 bool FP = TFI->hasFP(MF);
159 if (FP) {
|
| XCoreFrameLowering.cpp | 100 bool FP = hasFP(MF);
166 if (FP) {
179 // Set the FP from the SP.
184 // Show FP is now valid.
218 bool FP = hasFP(MF);
219 if (FP) {
243 if (FP) {
417 // A callee save register is used to hold the FP.
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 54 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
146 // Insert instruction "move $fp, $sp" at this location.
147 BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
149 // emit ".cfi_def_cfa_register $fp"
153 DstML = MachineLocation(FP);
170 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
182 // Insert instruction "move $sp, $fp" at this location.
183 BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 121 // when the FP is not needed.
154 unsigned FP = TFI->hasFP(MF) ? 1 : 0;
155 return 32 - FP - DefaultSafety;
425 // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP).
|
| PPCISelLowering.cpp | 182 // PowerPC wants to turn select_cc of FP into fsel when possible.
284 // They also have instructions for converting between i64 and fp.
289 // This is just the low 32 bits of a (signed) fp->i64 conversion.
[all...] |
| /external/llvm/tools/bugpoint/ |
| ExtractFunction.cpp | 248 Constant *FP = CS->getOperand(1);
249 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP))
251 FP = CE->getOperand(0);
252 if (Function *F = dyn_cast<Function>(FP)) {
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 157 unsigned FP = TFI->hasFP(MF) ? 1 : 0;
158 return 10 - FP - (STI.isR9Reserved() ? 1 : 0);
279 // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited
455 /// reference would be better served by a base register other than FP
499 // will be earlier than the FP, so we ignore those.
517 // The FP is only available if there is no dynamic realignment. We
|
| ARMFastISel.cpp | 513 // the combined constant into an FP reg.
537 // Require VFP2 for loading fp constants.
[all...] |
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 317 Constant *FP = CS->getOperand(1);
318 if (FP->isNullValue())
322 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP))
324 FP = CE->getOperand(0);
327 if (Function *F = dyn_cast<Function>(FP))
[all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| encoder.h | 52 // maximum number of FP registers for inputs
59 // maximum number of FP registers for inputs
73 // maximum number of FP registers for inputs
195 enum Tag { SignedImm, UnsignedImm, Reg, Mem, FP, XMM };
635 // load from memory (as fp) into fp register stack
639 // load from memory (as int) into fp register stack
642 // push st(i) onto fp register stack
645 // push the constants 0.0 and 1.0 onto the fp register stack
651 // store stack to to memory (as fp), optionally popping the stac
[all...] |
| /external/llvm/lib/IR/ |
| PassManager.cpp | 272 FPPassManager *FP = static_cast<FPPassManager *>(PassManagers[N]);
273 return FP;
[all...] |
| /external/llvm/lib/Transforms/Vectorize/ |
| BBVectorize.cpp | [all...] |
| LoopVectorize.cpp | [all...] |
| /external/valgrind/main/massif/ |
| ms_main.c | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 279 // SSE has no i16 to fp conversion, only i32
601 // Set up the FP register classes.
629 // Expand FP immediates into loads from the stack, except for the special
635 // Set up the FP register classes.
656 // Special cases we handle for FP constants.
670 // Set up the FP register classes.
[all...] |
| /external/robolectric/lib/main/ |
| sqlite-jdbc-3.7.2.jar | |
