/external/skia/include/core/ |
SkChecksum.h | 21 ROTL = sizeof(uintptr_t) * 8 - ROTR, 26 return ((total >> ROTR) | (total << ROTL)) ^ value;
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/external/chromium/net/http/ |
md4.cc | 65 #define ROTL(x,n) (((x) << (n)) | ((x) >> (0x20 - n))) 68 #define RD1(a,b,c,d,k,s) a += F(b,c,d) + X[k]; a = ROTL(a,s) 71 #define RD2(a,b,c,d,k,s) a += G(b,c,d) + X[k] + 0x5A827999; a = ROTL(a,s) 74 #define RD3(a,b,c,d,k,s) a += H(b,c,d) + X[k] + 0x6ED9EBA1; a = ROTL(a,s)
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/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 318 SHL, SRA, SRL, ROTL, ROTR, [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 118 setOperationAction(ISD::ROTL , MVT::i64, Legal); 122 setOperationAction(ISD::ROTL , MVT::i64, Expand); 126 setOperationAction(ISD::ROTL , MVT::i32, Legal); 130 setOperationAction(ISD::ROTL , MVT::i32, Expand); 134 setOperationAction(ISD::ROTL , MVT::i16, Expand); 136 setOperationAction(ISD::ROTL , MVT::i8, Expand); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 175 case ISD::ROTL: return "rotl";
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LegalizeVectorOps.cpp | 211 case ISD::ROTL:
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SelectionDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
/external/openssl/crypto/bn/asm/ |
ppc.pl | 126 $ROTL= "rotlwi"; # rotate left by immediate 150 $ROTL= "rotldi"; # rotate left by immediate [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 101 setOperationAction(ISD::ROTL, MVT::i8, Expand); 103 setOperationAction(ISD::ROTL, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 386 } else if (Opcode == ISD::ROTL) { [all...] |
/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 63 setOperationAction(ISD::ROTL, MVT::i32, Custom); 314 case ISD::ROTL: return LowerROTL(Op, DAG); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 166 setOperationAction(ISD::ROTL, MVT::i32, Expand); [all...] |
/external/valgrind/main/VEX/priv/ |
guest_ppc_toIR.c | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 772 setOperationAction(ISD::ROTL , MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 124 setOperationAction(ISD::ROTL, MVT::i32, Expand); 125 setOperationAction(ISD::ROTL, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 110 setOperationAction(ISD::ROTL , MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 298 setOperationAction(ISD::ROTL, MVT::i32, Expand); 299 setOperationAction(ISD::ROTL, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 663 // ARM does not have ROTL. 664 setOperationAction(ISD::ROTL, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |