/external/llvm/lib/Target/ARM/ |
ARMTargetTransformInfo.cpp | 248 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 }, 250 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 }, 252 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 }, 266 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 }, 268 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 }, 270 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } 284 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, 286 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, 288 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, 290 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 } [all...] |
ARMISelLowering.cpp | 112 setOperationAction(ISD::FP_TO_UINT, VT, Custom); 117 setOperationAction(ISD::FP_TO_UINT, VT, Expand); 561 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); 596 setTargetDAGCombine(ISD::FP_TO_UINT); [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 392 FP_TO_UINT, [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 46 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Expand); 70 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom); 448 case ISD::FP_TO_UINT: Results.push_back(LowerFPTOUINT(N->getOperand(0), DAG)); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 228 case ISD::FP_TO_UINT: return "fp_to_uint";
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LegalizeVectorTypes.cpp | 84 case ISD::FP_TO_UINT: 540 case ISD::FP_TO_UINT: [all...] |
LegalizeVectorOps.cpp | 227 case ISD::FP_TO_UINT:
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LegalizeIntegerTypes.cpp | 98 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break; 356 // If we're promoting a UINT to a larger size and the larger FP_TO_UINT is 360 if (N->getOpcode() == ISD::FP_TO_UINT && 361 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) && 370 return DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ? [all...] |
LegalizeFloatTypes.cpp | 613 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break; 685 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!"); [all...] |
LegalizeDAG.cpp | [all...] |
SelectionDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 237 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); 238 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); 239 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 77 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 312 // Handle FP_TO_UINT by promoting the destination to a larger signed 314 setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); 315 setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); 316 setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); 319 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand); 320 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); 324 // Expand FP_TO_UINT into a select. 327 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand); 331 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom); 337 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom) [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 726 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 286 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); 291 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); 298 // PowerPC does not have FP_TO_UINT on 32-bit implementations. 299 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); 408 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 287 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); 288 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand); [all...] |