1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the Mips specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef MIPSTARGETMACHINE_H 15 #define MIPSTARGETMACHINE_H 16 17 #include "MipsFrameLowering.h" 18 #include "MipsISelLowering.h" 19 #include "MipsInstrInfo.h" 20 #include "MipsJITInfo.h" 21 #include "MipsSelectionDAGInfo.h" 22 #include "MipsSubtarget.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/IR/DataLayout.h" 25 #include "llvm/Target/TargetFrameLowering.h" 26 #include "llvm/Target/TargetMachine.h" 27 28 namespace llvm { 29 class formatted_raw_ostream; 30 class MipsRegisterInfo; 31 32 class MipsTargetMachine : public LLVMTargetMachine { 33 MipsSubtarget Subtarget; 34 const DataLayout DL; // Calculates type size & alignment 35 OwningPtr<const MipsInstrInfo> InstrInfo; 36 OwningPtr<const MipsFrameLowering> FrameLowering; 37 OwningPtr<const MipsTargetLowering> TLInfo; 38 MipsSelectionDAGInfo TSInfo; 39 MipsJITInfo JITInfo; 40 41 public: 42 MipsTargetMachine(const Target &T, StringRef TT, 43 StringRef CPU, StringRef FS, const TargetOptions &Options, 44 Reloc::Model RM, CodeModel::Model CM, 45 CodeGenOpt::Level OL, 46 bool isLittle); 47 48 virtual ~MipsTargetMachine() {} 49 50 virtual const MipsInstrInfo *getInstrInfo() const 51 { return InstrInfo.get(); } 52 virtual const TargetFrameLowering *getFrameLowering() const 53 { return FrameLowering.get(); } 54 virtual const MipsSubtarget *getSubtargetImpl() const 55 { return &Subtarget; } 56 virtual const DataLayout *getDataLayout() const 57 { return &DL;} 58 virtual MipsJITInfo *getJITInfo() 59 { return &JITInfo; } 60 61 virtual const MipsRegisterInfo *getRegisterInfo() const { 62 return &InstrInfo->getRegisterInfo(); 63 } 64 65 virtual const MipsTargetLowering *getTargetLowering() const { 66 return TLInfo.get(); 67 } 68 69 virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const { 70 return &TSInfo; 71 } 72 73 // Pass Pipeline Configuration 74 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 75 virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE); 76 }; 77 78 /// MipsebTargetMachine - Mips32/64 big endian target machine. 79 /// 80 class MipsebTargetMachine : public MipsTargetMachine { 81 virtual void anchor(); 82 public: 83 MipsebTargetMachine(const Target &T, StringRef TT, 84 StringRef CPU, StringRef FS, const TargetOptions &Options, 85 Reloc::Model RM, CodeModel::Model CM, 86 CodeGenOpt::Level OL); 87 }; 88 89 /// MipselTargetMachine - Mips32/64 little endian target machine. 90 /// 91 class MipselTargetMachine : public MipsTargetMachine { 92 virtual void anchor(); 93 public: 94 MipselTargetMachine(const Target &T, StringRef TT, 95 StringRef CPU, StringRef FS, const TargetOptions &Options, 96 Reloc::Model RM, CodeModel::Model CM, 97 CodeGenOpt::Level OL); 98 }; 99 100 } // End llvm namespace 101 102 #endif 103
