| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 38 int NumBytes = (int) MFI->getStackSize();
47 NumBytes += 92;
51 NumBytes = (NumBytes + 7) & ~7;
52 NumBytes = -NumBytes;
54 if (NumBytes >= -4096) {
56 .addReg(SP::O6).addImm(NumBytes);
60 unsigned OffHi = (unsigned)NumBytes >> 10U;
64 .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1))
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 41 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
42 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
92 unsigned NumBytes = MFI->getStackSize();
99 NumBytes = (NumBytes + 3) & ~3;
100 MFI->setStackSize(NumBytes);
112 if (NumBytes != 0)
113 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
159 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
165 NumBytes);
[all...] |
| Thumb2InstrInfo.cpp | 179 unsigned DestReg, unsigned BaseReg, int NumBytes,
182 bool isSub = NumBytes < 0;
183 if (isSub) NumBytes = -NumBytes;
188 NumBytes >= 4096 &&
189 ARM_AM::getT2SOImmVal(NumBytes) == -1) {
191 if (NumBytes < 65536) {
194 .addImm(NumBytes)
197 } else if ((NumBytes & 0xffff) == 0) {
201 .addImm(NumBytes >> 16
[all...] |
| Thumb1RegisterInfo.cpp | 94 int NumBytes, bool CanChangeCC,
106 if (NumBytes < 0 && !isHigh && CanChangeCC) {
108 NumBytes = -NumBytes;
116 if (NumBytes <= 255 && NumBytes >= 0)
118 .addImm(NumBytes).setMIFlags(MIFlags);
119 else if (NumBytes < 0 && NumBytes >= -255) {
121 .addImm(NumBytes).setMIFlags(MIFlags)
[all...] |
| ARMFrameLowering.cpp | 122 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags,
125 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
128 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
145 unsigned NumBytes = MFI->getStackSize();
161 // Allocate the vararg register save area. This is not counted in NumBytes.
167 if (NumBytes != 0)
168 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
234 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
239 NumBytes);
259 // Adjust NumBytes to represent the stack slots below the DPRCS2 area
[all...] |
| ARMBaseInstrInfo.h | 384 unsigned DestReg, unsigned BaseReg, int NumBytes,
390 unsigned DestReg, unsigned BaseReg, int NumBytes,
396 int NumBytes, const TargetInstrInfo &TII,
|
| /external/clang/lib/Rewrite/Core/ |
| RewriteRope.cpp | 116 /// erase - Remove NumBytes from this node at the specified offset. We are
118 void erase(unsigned Offset, unsigned NumBytes);
218 /// erase - Remove NumBytes from this node at the specified offset. We are
220 void erase(unsigned Offset, unsigned NumBytes);
334 /// erase - Remove NumBytes from this node at the specified offset. We are
336 void RopePieceBTreeLeaf::erase(unsigned Offset, unsigned NumBytes) {
347 // Figure out how many pieces completely cover 'NumBytes'. We want to remove
349 for (; Offset+NumBytes > PieceOffs+getPiece(i).size(); ++i)
353 if (Offset+NumBytes == PieceOffs+getPiece(i).size())
368 NumBytes -= CoverBytes
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 54 uint64_t NumBytes = 0;
58 NumBytes = FrameSize - MSP430FI->getCalleeSavedFrameSize();
63 MFI->setOffsetAdjustment(-NumBytes);
79 NumBytes = StackSize - MSP430FI->getCalleeSavedFrameSize();
88 if (NumBytes) { // adjust stack pointer: SPW -= numbytes
91 //NumBytes -= mergeSPUpdates(MBB, MBBI, true);
94 // mergeSPUpdatesDown(MBB, MBBI, &NumBytes);
96 if (NumBytes) {
99 .addReg(MSP430::SPW).addImm(NumBytes);
[all...] |
| /external/llvm/include/llvm/Support/ |
| Memory.h | 55 /// \p NumBytes bytes of virtual memory is made.
77 static MemoryBlock allocateMappedMemory(size_t NumBytes,
113 /// attempt to allocate \p NumBytes bytes of virtual memory is made.
121 static MemoryBlock AllocateRWX(size_t NumBytes,
|
| /external/clang/include/clang/Rewrite/Core/ |
| RewriteRope.h | 173 void erase(unsigned Offset, unsigned NumBytes);
226 void erase(unsigned Offset, unsigned NumBytes) {
227 assert(Offset+NumBytes <= size() && "Invalid region to erase!");
228 if (NumBytes == 0) return;
229 Chunks.erase(Offset, NumBytes);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 102 int64_t NumBytes,
107 unsigned ScratchReg, int64_t NumBytes,
|
| AArch64InstrInfo.cpp | 618 int64_t NumBytes, MachineInstr::MIFlag MIFlags) {
619 if (NumBytes == 0 && DstReg == SrcReg)
621 else if (abs(NumBytes) & ~0xffffff) {
625 uint64_t Bits = static_cast<uint64_t>(abs(NumBytes));
655 unsigned AddOp = NumBytes > 0 ? AArch64::ADDxxx_uxtx : AArch64::SUBxxx_uxtx;
670 if (NumBytes >= 0) {
676 NumBytes = abs(NumBytes);
681 if ((NumBytes & 0xfff) || NumBytes == 0)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 91 int NumBytes = (int) MFI->getStackSize();
147 if (NumBytes >= ALLOCFRAME_MAX) {
153 HEXAGON_RESERVED_REG_1).addImm(NumBytes);
159 BuildMI(MBB, InsertPt, dl, TII.get(Hexagon::ALLOCFRAME)).addImm(NumBytes);
186 int NumBytes = (int) MFI->getStackSize();
198 .addImm(NumBytes);
200 BuildMI(MBB, MBBI, dl, TII.get(Hexagon::DEALLOCFRAME)).addImm(NumBytes);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsAsmBackend.cpp | 114 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
133 for (unsigned i = 0; i != NumBytes; ++i) {
143 for (unsigned i = 0; i != NumBytes; ++i) {
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 147 unsigned StackPtr, int64_t NumBytes,
150 bool isSub = NumBytes < 0;
151 uint64_t Offset = isSub ? -NumBytes : NumBytes;
205 unsigned StackPtr, uint64_t *NumBytes = NULL) {
214 if (NumBytes)
215 *NumBytes += PI->getOperand(2).getImm();
220 if (NumBytes)
221 *NumBytes -= PI->getOperand(2).getImm();
230 unsigned StackPtr, uint64_t *NumBytes = NULL)
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCObjectStreamer.h | 105 virtual void EmitFill(uint64_t NumBytes, uint8_t FillValue,
|
| MCStreamer.h | 460 /// EmitFill - Emit NumBytes bytes worth of the value specified by
462 virtual void EmitFill(uint64_t NumBytes, uint8_t FillValue,
465 /// EmitZeros - Emit NumBytes worth of zeros. This is a convenience
467 void EmitZeros(uint64_t NumBytes, unsigned AddrSpace = 0) {
468 EmitFill(NumBytes, 0, AddrSpace);
|
| /external/llvm/lib/Support/ |
| raw_ostream.cpp | 301 size_t NumBytes = OutBufEnd - OutBufCur;
307 size_t BytesToWrite = Size - (Size % NumBytes);
320 copy_to_buffer(Ptr, NumBytes);
322 return write(Ptr + NumBytes, Size - NumBytes);
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 180 unsigned NumBytes = getFixupKindInfo(Fixup.getKind()).TargetSize / 8;
185 assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!");
189 for (unsigned i = 0; i != NumBytes; ++i) {
|
| /external/llvm/lib/MC/ |
| MCObjectStreamer.cpp | 341 void MCObjectStreamer::EmitFill(uint64_t NumBytes, uint8_t FillValue,
346 getOrCreateDataFragment()->getContents().append(NumBytes, FillValue);
|
| MCAsmStreamer.cpp | 203 virtual void EmitFill(uint64_t NumBytes, uint8_t FillValue,
740 /// EmitFill - Emit NumBytes bytes worth of the value specified by
742 void MCAsmStreamer::EmitFill(uint64_t NumBytes, uint8_t FillValue,
744 if (NumBytes == 0) return;
748 OS << ZeroDirective << NumBytes;
756 MCStreamer::EmitFill(NumBytes, FillValue, AddrSpace);
[all...] |
| /external/llvm/utils/TableGen/ |
| DAGISelMatcherEmitter.cpp | 105 unsigned NumBytes = 0;
108 ++NumBytes;
110 return NumBytes+1;
122 unsigned NumBytes = 0;
126 ++NumBytes;
132 return NumBytes+1;
|
| /external/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | [all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.cpp | 610 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
615 assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!");
620 for (unsigned i = 0; i != NumBytes; ++i)
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | 619 int NumBytes = FltVal.getBitWidth() / 8; // 8 bits per byte.
622 int Start = (LittleEndian ? 0 : NumBytes - 1);
623 int Stop = (LittleEndian ? NumBytes : -1);
671 int NumBytes = Val.getBitWidth() / 8; // 8 bits per byte.
675 for (int i = 0; i < NumBytes; i++) {
680 c = Ptr64[(NumBytes - 1 - i) / 8] >> (8 * ((NumBytes - 1 - i) & 7));
[all...] |
