/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.h | 39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O); 43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O); 44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); 46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum, 48 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, 51 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 52 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, [all...] |
ARMInstPrinter.cpp | 315 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, 317 const MCOperand &MO1 = MI->getOperand(OpNum); 334 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, 336 const MCOperand &MO1 = MI->getOperand(OpNum); 337 const MCOperand &MO2 = MI->getOperand(OpNum+1); 338 const MCOperand &MO3 = MI->getOperand(OpNum+2); 353 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, 355 const MCOperand &MO1 = MI->getOperand(OpNum); 356 const MCOperand &MO2 = MI->getOperand(OpNum+1); 443 unsigned OpNum, [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.h | 40 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 42 printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize); 46 void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 51 unsigned OpNum, raw_ostream &O); 53 unsigned OpNum, raw_ostream &O); 55 void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 58 void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 59 void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60 void printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 63 void printCondCodeOperand(const MCInst *MI, unsigned OpNum, [all...] |
AArch64InstPrinter.cpp | 54 unsigned OpNum, raw_ostream &O) { 55 const MCOperand &MOImm = MI->getOperand(OpNum); 62 AArch64InstPrinter::printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 65 unsigned ExtImm = MI->getOperand(OpNum).getImm(); 93 unsigned OpNum, raw_ostream &O) { 94 const MCOperand &Imm12Op = MI->getOperand(OpNum); 107 AArch64InstPrinter::printAddSubImmLSL12Operand(const MCInst *MI, unsigned OpNum, 110 printAddSubImmLSL0Operand(MI, OpNum, O); 116 AArch64InstPrinter::printBareImmOperand(const MCInst *MI, unsigned OpNum, 118 const MCOperand &MO = MI->getOperand(OpNum); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430AsmPrinter.cpp | 49 void printOperand(const MachineInstr *MI, int OpNum, 51 void printSrcMemOperand(const MachineInstr *MI, int OpNum, 64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 66 const MachineOperand &MO = MI->getOperand(OpNum); 111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, 113 const MachineOperand &Base = MI->getOperand(OpNum); 114 const MachineOperand &Disp = MI->getOperand(OpNum+1); 121 printOperand(MI, OpNum+1, O, "nohash"); 126 printOperand(MI, OpNum, O);
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/external/llvm/lib/Target/AArch64/ |
AArch64AsmPrinter.cpp | 154 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 161 const MachineOperand &MO = MI->getOperand(OpNum); 193 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O); 195 if (!MI->getOperand(OpNum).isImm()) 197 O << MI->getOperand(OpNum).getImm(); 202 return printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI, 207 return printModifiedGPRAsmOperand(MI->getOperand(OpNum), TRI, 225 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI, 229 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI, 233 return printModifiedFPRAsmOperand(MI->getOperand(OpNum), TRI [all...] |
AArch64AsmPrinter.h | 51 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 54 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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/external/llvm/include/llvm/MC/MCParser/ |
MCParsedAsmOperand.h | 37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; }
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/external/llvm/lib/Target/ARM/ |
ARMAsmPrinter.h | 56 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, 59 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 62 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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ARMAsmPrinter.cpp | 334 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 336 const MachineOperand &MO = MI->getOperand(OpNum); 416 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 426 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O); 428 if (MI->getOperand(OpNum).isReg()) { 430 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 436 if (!MI->getOperand(OpNum).isImm()) 438 O << MI->getOperand(OpNum).getImm(); 442 printOperand(MI, OpNum, O); 445 if (MI->getOperand(OpNum).isReg()) [all...] |
Thumb2SizeReduction.cpp | 349 unsigned OpNum = 3; // First 'rest' of operands. 387 OpNum = 4; 408 OpNum = 0; 417 OpNum = 2; 425 OpNum = 0; 432 OpNum = 2; 482 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum) 483 MIB.addOperand(MI->getOperand(OpNum)); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsAsmPrinter.cpp | 322 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 329 const MachineOperand &MO = MI->getOperand(OpNum); 333 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O); 369 if (OpNum == 0) 371 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); 387 unsigned RegOp = OpNum; 393 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; 396 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1 [all...] |
MipsAsmPrinter.h | 73 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 76 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 77 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O); 78 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 79 void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O); 80 void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
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/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
BitcodeReader.cpp | [all...] |
/external/llvm/include/llvm/MC/ |
MCInstrDesc.h | 151 int getOperandConstraint(unsigned OpNum, 153 if (OpNum < NumOperands && 154 (OpInfo[OpNum].Constraints & (1 << Constraint))) { 156 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
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/external/llvm/lib/Target/R600/InstPrinter/ |
AMDGPUInstPrinter.h | 36 void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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AMDGPUInstPrinter.cpp | 47 void AMDGPUInstPrinter::printInterpSlot(const MCInst *MI, unsigned OpNum, 49 unsigned Imm = MI->getOperand(OpNum).getImm();
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/external/llvm/utils/PerfectShuffle/ |
PerfectShuffle.cpp | 106 unsigned short OpNum; 110 Operator(unsigned short shufflemask, const char *name, unsigned opnum, 112 : ShuffleMask(shufflemask), OpNum(opnum), Name(name), Cost(cost) { 303 for (unsigned opnum = 0, e = TheOperators.size(); opnum != e; ++opnum) { 304 Operator *Op = TheOperators[opnum]; 394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0 [all...] |
/external/llvm/lib/CodeGen/ |
RegAllocFast.cpp | 74 unsigned short LastOpNum; // OpNum on LastUse. 189 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum, 191 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum, 194 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg); 582 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum, 607 LRI->LastOpNum = OpNum; 615 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum, 622 MachineOperand &MO = MI->getOperand(OpNum); 658 LRI->LastOpNum = OpNum; 663 // setPhysReg - Change operand OpNum in MI the refer the PhysReg, considerin [all...] |
TargetInstrInfo.cpp | 39 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum, 42 if (OpNum >= MCID.getNumOperands()) 45 short RegClass = MCID.OpInfo[OpNum].RegClass; 46 if (MCID.OpInfo[OpNum].isLookupPtrRegClass())
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/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 59 /// class constraint for OpNum, or NULL. 61 unsigned OpNum, [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 360 unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, 362 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, 367 unsigned OpNum,
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 264 unsigned getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum, 266 unsigned getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum, 268 unsigned getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum, 270 unsigned getT2AddrModeImm12OffsetOpValue(const MCInst &MI, unsigned OpNum, [all...] |