| /external/llvm/lib/MC/ |
| MCRegisterInfo.cpp | 49 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
53 DwarfLLVMRegPair Key = { RegNum, 0 };
55 if (I == M+Size || I->FromReg != RegNum)
60 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
64 DwarfLLVMRegPair Key = { RegNum, 0 };
66 assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
70 int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
71 const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
72 if (I == L2SEHRegs.end()) return (int)RegNum;
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.h | 61 virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const;
|
| NVPTXRegisterInfo.cpp | 141 getDwarfRegNum(unsigned RegNum, bool isEH) const {
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 152 int matchRegisterByNumber(unsigned RegNum, unsigned RegClass);
220 unsigned RegNum;
285 return Reg.RegNum;
317 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
319 Op->Reg.RegNum = RegNum;
347 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum));
354 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum));
362 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum));
370 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum));
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 66 int getCompactUnwindRegNum(unsigned RegNum, bool isEH) const;
|
| X86CodeEmitter.cpp | [all...] |
| X86RegisterInfo.cpp | 90 int X86RegisterInfo::getCompactUnwindRegNum(unsigned RegNum, bool isEH) const {
91 switch (getLLVMRegNum(RegNum, isEH)) {
|
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 365 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
368 int getLLVMRegNum(unsigned RegNum, bool isEH) const;
372 int getSEHRegNum(unsigned RegNum) const;
|
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 153 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg);
155 FPUBitmask |= (3 << RegNum);
161 FPUBitmask |= (1 << RegNum);
168 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg);
169 CPUBitmask |= (1 << RegNum);
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 137 IdentifyRegister(unsigned &RegNum, SMLoc &RegEndLoc, StringRef &LayoutSpec,
182 unsigned RegNum;
232 return Reg.RegNum;
739 static AArch64Operand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
741 Op->Reg.RegNum = RegNum;
745 static AArch64Operand *CreateWrappedReg(unsigned RegNum, SMLoc S, SMLoc E) {
747 Op->Reg.RegNum = RegNum;
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeAsmPrinter.cpp | 137 unsigned RegNum = getMBlazeRegisterNumbering(Reg);
139 CPUBitmask |= (1 << RegNum);
|
| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 91 unsigned RegNum;
149 return Reg.RegNum;
236 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
238 Op->Reg.RegNum = RegNum;
424 unsigned regNum;
425 if (String.substr(4).getAsInteger(10,regNum))
428 return regNum;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 141 unsigned RegNum;
143 Values(unsigned r) : RegNum(r) {}
160 return Contents.RegNum;
163 Contents.RegNum = Val;
|
| PPCISelLowering.cpp | [all...] |
| /external/clang/lib/Basic/ |
| TargetInfo.cpp | 248 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
301 if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 353 unsigned RegNum;
358 unsigned RegNum;
387 unsigned RegNum;
543 return Reg.RegNum;
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.h | 37 void printRegName(raw_ostream &O, unsigned RegNum) const;
|
| /external/clang/include/clang/Basic/ |
| TargetInfo.h | 559 const unsigned RegNum;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 485 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg);
491 ((isNotVFP && RegNum > PRegNum) ||
492 ((Count < Limit) && RegNum == PRegNum+1))) {
494 PRegNum = RegNum;
[all...] |
| ARMCodeEmitter.cpp | [all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDILCFGStructurizer.cpp | 282 void addLoopBreakOnReg(LoopT *LoopRep, RegiT RegNum);
283 void addLoopContOnReg(LoopT *LoopRep, RegiT RegNum);
284 void addLoopBreakInitReg(LoopT *LoopRep, RegiT RegNum);
285 void addLoopContInitReg(LoopT *LoopRep, RegiT RegNum);
286 void addLoopEndbranchInitReg(LoopT *LoopRep, RegiT RegNum);
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 954 if (unsigned RegNum = MO2.getReg()) {
956 printRegName(O, RegNum);
[all...] |
