| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 568 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
570 else if (NumOps > 3 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0) {
571 assert(Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1);
572 // Special case for GATHER with 2 TIED_TO operands
626 // it skips TIED_TO operands if exist, then increments past src1.
744 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 31 TIED_TO = 0, // Must be allocated the same register as.
|
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 180 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 146 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
151 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
|
| MachineVerifier.cpp | 827 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);
863 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO))
[all...] |
| RegAllocFast.cpp | [all...] |
| MachineInstr.cpp | 700 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 259 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
|
| ScheduleDAGSDNodes.cpp | 436 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
[all...] |
| InstrEmitter.cpp | 345 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1;
[all...] |
| ScheduleDAGRRList.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 163 assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
|
