1 .file "/home/timnor01/a64-trunk/llvm/test/CodeGen/AArch64/logical_shifted_reg.ll" 2 .text 3 .globl logical_32bit 4 .type logical_32bit,@function 5 logical_32bit: // @logical_32bit 6 .cfi_startproc 7 // BB#0: 8 adrp x0, var1_32 9 ldr w1, [x0, #:lo12:var1_32] 10 adrp x0, var2_32 11 ldr w2, [x0, #:lo12:var2_32] 12 and w3, w1, w2 13 adrp x0, var1_32 14 str w3, [x0, #:lo12:var1_32] 15 bic w3, w1, w2 16 adrp x0, var1_32 17 str w3, [x0, #:lo12:var1_32] 18 orr w3, w1, w2 19 adrp x0, var1_32 20 str w3, [x0, #:lo12:var1_32] 21 orn w3, w1, w2 22 adrp x0, var1_32 23 str w3, [x0, #:lo12:var1_32] 24 eor w3, w1, w2 25 adrp x0, var1_32 26 str w3, [x0, #:lo12:var1_32] 27 eon w3, w2, w1 28 adrp x0, var1_32 29 str w3, [x0, #:lo12:var1_32] 30 and w3, w1, w2, lsl #31 31 adrp x0, var1_32 32 str w3, [x0, #:lo12:var1_32] 33 bic w3, w1, w2, lsl #31 34 adrp x0, var1_32 35 str w3, [x0, #:lo12:var1_32] 36 orr w3, w1, w2, lsl #31 37 adrp x0, var1_32 38 str w3, [x0, #:lo12:var1_32] 39 orn w3, w1, w2, lsl #31 40 adrp x0, var1_32 41 str w3, [x0, #:lo12:var1_32] 42 eor w3, w1, w2, lsl #31 43 adrp x0, var1_32 44 str w3, [x0, #:lo12:var1_32] 45 eon w3, w1, w2, lsl #31 46 adrp x0, var1_32 47 str w3, [x0, #:lo12:var1_32] 48 bic w3, w1, w2, asr #10 49 adrp x0, var1_32 50 str w3, [x0, #:lo12:var1_32] 51 eor w3, w1, w2, asr #10 52 adrp x0, var1_32 53 str w3, [x0, #:lo12:var1_32] 54 orn w3, w1, w2, lsr #1 55 adrp x0, var1_32 56 str w3, [x0, #:lo12:var1_32] 57 eor w3, w1, w2, lsr #1 58 adrp x0, var1_32 59 str w3, [x0, #:lo12:var1_32] 60 eon w3, w1, w2, ror #20 61 adrp x0, var1_32 62 str w3, [x0, #:lo12:var1_32] 63 and w1, w1, w2, ror #20 64 adrp x0, var1_32 65 str w1, [x0, #:lo12:var1_32] 66 ret 67 .Ltmp0: 68 .size logical_32bit, .Ltmp0-logical_32bit 69 .cfi_endproc 70 71 .globl logical_64bit 72 .type logical_64bit,@function 73 logical_64bit: // @logical_64bit 74 .cfi_startproc 75 // BB#0: 76 adrp x0, var1_64 77 ldr x0, [x0, #:lo12:var1_64] 78 adrp x1, var2_64 79 ldr x1, [x1, #:lo12:var2_64] 80 and x2, x0, x1 81 adrp x3, var1_64 82 str x2, [x3, #:lo12:var1_64] 83 bic x2, x0, x1 84 adrp x3, var1_64 85 str x2, [x3, #:lo12:var1_64] 86 orr x2, x0, x1 87 adrp x3, var1_64 88 str x2, [x3, #:lo12:var1_64] 89 orn x2, x0, x1 90 adrp x3, var1_64 91 str x2, [x3, #:lo12:var1_64] 92 eor x2, x0, x1 93 adrp x3, var1_64 94 str x2, [x3, #:lo12:var1_64] 95 eon x2, x1, x0 96 adrp x3, var1_64 97 str x2, [x3, #:lo12:var1_64] 98 and x2, x0, x1, lsl #63 99 adrp x3, var1_64 100 str x2, [x3, #:lo12:var1_64] 101 bic x2, x0, x1, lsl #63 102 adrp x3, var1_64 103 str x2, [x3, #:lo12:var1_64] 104 orr x2, x0, x1, lsl #63 105 adrp x3, var1_64 106 str x2, [x3, #:lo12:var1_64] 107 orn x2, x0, x1, lsl #63 108 adrp x3, var1_64 109 str x2, [x3, #:lo12:var1_64] 110 eor x2, x0, x1, lsl #63 111 adrp x3, var1_64 112 str x2, [x3, #:lo12:var1_64] 113 eon x2, x0, x1, lsl #63 114 adrp x3, var1_64 115 str x2, [x3, #:lo12:var1_64] 116 bic x2, x0, x1, asr #10 117 adrp x3, var1_64 118 str x2, [x3, #:lo12:var1_64] 119 eor x2, x0, x1, asr #10 120 adrp x3, var1_64 121 str x2, [x3, #:lo12:var1_64] 122 orn x2, x0, x1, lsr #1 123 adrp x3, var1_64 124 str x2, [x3, #:lo12:var1_64] 125 eor x2, x0, x1, lsr #1 126 adrp x3, var1_64 127 str x2, [x3, #:lo12:var1_64] 128 eon x2, x0, x1, ror #20 129 adrp x3, var1_64 130 str x2, [x3, #:lo12:var1_64] 131 and x0, x0, x1, ror #20 132 adrp x1, var1_64 133 str x0, [x1, #:lo12:var1_64] 134 ret 135 .Ltmp1: 136 .size logical_64bit, .Ltmp1-logical_64bit 137 .cfi_endproc 138 139 .globl flag_setting 140 .type flag_setting,@function 141 flag_setting: // @flag_setting 142 .cfi_startproc 143 // BB#0: 144 sub sp, sp, #16 145 adrp x0, var1_64 146 ldr x0, [x0, #:lo12:var1_64] 147 adrp x1, var2_64 148 ldr x1, [x1, #:lo12:var2_64] 149 tst x0, x1 150 str x0, [sp, #8] // 8-byte Folded Spill 151 str x1, [sp] // 8-byte Folded Spill 152 b.gt .LBB2_4 153 b .LBB2_1 154 .LBB2_1: // %test2 155 ldr x0, [sp, #8] // 8-byte Folded Reload 156 ldr x1, [sp] // 8-byte Folded Reload 157 tst x0, x1, lsl #63 158 b.lt .LBB2_4 159 b .LBB2_2 160 .LBB2_2: // %test3 161 ldr x0, [sp, #8] // 8-byte Folded Reload 162 ldr x1, [sp] // 8-byte Folded Reload 163 tst x0, x1, asr #12 164 b.gt .LBB2_4 165 b .LBB2_3 166 .LBB2_3: // %other_exit 167 adrp x0, var1_64 168 ldr x1, [sp, #8] // 8-byte Folded Reload 169 str x1, [x0, #:lo12:var1_64] 170 add sp, sp, #16 171 ret 172 .LBB2_4: // %ret 173 add sp, sp, #16 174 ret 175 .Ltmp2: 176 .size flag_setting, .Ltmp2-flag_setting 177 .cfi_endproc 178 179 .type var1_32,@object // @var1_32 180 .bss 181 .globl var1_32 182 .align 2 183 var1_32: 184 .word 0 // 0x0 185 .size var1_32, 4 186 187 .type var2_32,@object // @var2_32 188 .globl var2_32 189 .align 2 190 var2_32: 191 .word 0 // 0x0 192 .size var2_32, 4 193 194 .type var1_64,@object // @var1_64 195 .globl var1_64 196 .align 3 197 var1_64: 198 .xword 0 // 0x0 199 .size var1_64, 8 200 201 .type var2_64,@object // @var2_64 202 .globl var2_64 203 .align 3 204 var2_64: 205 .xword 0 // 0x0 206 .size var2_64, 8 207 208 209
