| /external/clang/test/CodeGen/ |
| x86_64-arguments-nacl.c | 33 // CHECK: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
34 void f6(char a0, short a1, int a2, long long a3, void *a4) {
38 // CHECK: define void @f8_2(i64 %a0.coerce)
44 void f8_2(union u8 a0) {}
49 // CHECK: define void @f10(i64 %a0.coerce)
51 void f10(struct s10 a0) {}
57 // CHECK: define void @f12_1(i32 %a0.coerce)
60 void f12_1(struct s12 a0) {}
|
| /external/clang/test/SemaCXX/ |
| constexpr-many-arguments.cpp | 6 constexpr type1(int a0) : my_data{a0} {}
25 constexpr type3(type2 a0, type2 a1) : my_data{a0, a1} {}
|
| /external/clang/test/SemaTemplate/ |
| dependent-sized_array.cpp | 14 int a0[] = {}; // expected-warning{{zero}} local
|
| /external/regex-re2/re2/ |
| variadic_function.h | 20 Result operator()(Param0 p0, Param1 p1, const Arg& a0) const {
21 const Arg* const args[] = { &a0 };
25 Result operator()(Param0 p0, Param1 p1, const Arg& a0, const Arg& a1) const {
26 const Arg* const args[] = { &a0, &a1 };
30 Result operator()(Param0 p0, Param1 p1, const Arg& a0, const Arg& a1,
32 const Arg* const args[] = { &a0, &a1, &a2 };
36 Result operator()(Param0 p0, Param1 p1, const Arg& a0, const Arg& a1,
38 const Arg* const args[] = { &a0, &a1, &a2, &a3 };
42 Result operator()(Param0 p0, Param1 p1, const Arg& a0, const Arg& a1,
44 const Arg* const args[] = { &a0, &a1, &a2, &a3, &a4 }
[all...] |
| /external/qemu/distrib/sdl-1.2.15/src/video/ataricommon/ |
| SDL_ataric2p.S | 64 movel c2p_cursrc,a0
67 movel a0,a2
70 movel a0@+,d0
71 movel a0@+,d1
72 movel a0@+,d2
73 movel a0@+,d3
121 movel a0@+,d0
122 movel a0@+,d1
123 movel a0@+,d2
124 movel a0@+,d
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 70 __ addu(v0, a0, a1);
95 __ mov(a1, a0);
230 __ Movn(a0, t3, t0); // Move a0<-t3 (t0 is NOT 0).
231 __ Ins(a0, t1, 12, 8); // 0x7ff34fff
232 __ Branch(&error, ne, a0, Operand(0x7ff34fff));
233 __ Movz(a0, t6, t7); // a0 not updated (t7 is NOT 0).
234 __ Ext(a1, a0, 8, 12); // 0x34f
236 __ Movz(a0, t6, v1); // a0<-t6, v0 is 0, from 8 instr back
[all...] |
| /system/core/libpixelflinger/arch-mips/ |
| t32cb16blend.S | 182 and $t0,$a0,3
189 addu $a0,2
192 lhu $t3,-2($a0)
194 sh $t1,-2($a0)
207 addu $a0,8
215 lw $t3,-8($a0)
219 sw $t1,-8($a0)
231 lw $t3,-4($a0)
235 sw $t1,-4($a0)
248 addu $a0,
[all...] |
| /system/core/libcutils/tests/memset_mips/ |
| memset_cmips.S | 67 addu t0,a0,a2 # t0 is the "past the end" address
70 move v0,a0 # memset returns the dst pointer
73 subu v1,zero,a0
90 SWHI a1,0(a0)
91 addu a0,a0,v1
93 # Here we have the "word-aligned" a0 (until the "last4")
101 addu a3,a0,a3 # Now a3 is the final dst after 64-byte chunks
105 # "pref 30,64(a0)" prefetch, which can be used as "pref 30,0(a0)" afte
[all...] |
| /dalvik/vm/mterp/mips/ |
| OP_SPUT_WIDE.S | 20 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
24 JAL(dvmQuasiAtomicSwap64Sync) # stores a0/a1 into addr a2
26 STORE64_off(a0, a1, a2, offStaticField_value) # field <- vAA/vAA+1
45 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
48 move a0, v0
|
| OP_INVOKE_SUPER_QUICK.S | 23 LOAD_eas2(a0, a2, a1) # a0 <- super->vtable[BBBB]
25 b common_invokeMethod${routine} # (a0=method, rOBJ="this")
|
| OP_MUL_LONG_2ADDR.S | 9 LOAD64(a0, a1, t0) # vAA.low / high
15 mul v1, a3, a0 # v1= a3a0
16 multu a2, a0
|
| binflop2addr.S | 5 * that specifies an instruction that performs "result = a0 op a1".
17 GET_VREG(a0, rOBJ) # a0 <- vA
36 $instr # result <- op, a0-a3 changed
|
| alt_stub.S | 16 move a0, rPC # arg0
|
| /external/eigen/unsupported/Eigen/src/NumericalDiff/ |
| NumericalDiff.h | 50 NumericalDiff(const T0& a0) : Functor(a0), epsfcn(0) {}
52 NumericalDiff(const T0& a0, const T1& a1) : Functor(a0, a1), epsfcn(0) {}
54 NumericalDiff(const T0& a0, const T1& a1, const T2& a2) : Functor(a0, a1, a2), epsfcn(0) {}
|
| /external/skia/legacy/src/opts/ |
| SkBitmapProcState_opts_SSSE3.cpp | 82 __m128i a0, a1, a2, a3; local
84 a0 = _mm_cvtsi32_si128(pixel0);
89 a0 = _mm_unpacklo_epi8(a0, a1);
99 a0 = _mm_unpacklo_epi64(a0, a2);
107 return _mm_maddubs_epi16(a0, scale_x);
168 __m128i a0 = _mm_cvtsi32_si128(pixel0); local
172 a0 = _mm_unpacklo_epi8(a0, a1)
260 __m128i a0 = _mm_cvtsi32_si128(pixel0); local
[all...] |
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_SQRT_DOUBLE_VFP.S | 14 LOAD64(rARG0, rARG1, a2) # a0/a1<- vBB/vBB+1
|
| /external/qemu/distrib/sdl-1.2.15/src/timer/mint/ |
| SDL_vbltimer.S | 85 lea _my_vbl,a0
121 movel a0,(a1)
172 moveml d0-d7/a0-a6,sp@
174 moveml d0-d7/a0-a6,sp@-
203 movel my_vector,a0
204 jsr a0@
215 moveml sp@,d0-d7/a0-a6
218 moveml sp@+,d0-d7/a0-a6
|
| /bionic/libc/arch-mips/syscalls/ |
| __brk.S | 14 move $a0, $v0
|
| __fcntl.S | 14 move $a0, $v0
|
| __fcntl64.S | 14 move $a0, $v0
|
| __fork.S | 14 move $a0, $v0
|
| __fstatfs64.S | 14 move $a0, $v0
|
| __getcpu.S | 14 move $a0, $v0
|
| __getcwd.S | 14 move $a0, $v0
|
| __getpriority.S | 14 move $a0, $v0
|
