/external/llvm/include/llvm/CodeGen/ |
LiveRangeEdit.h | 152 /// Remat - Information needed to rematerialize at a specific location. 153 struct Remat { 154 VNInfo *ParentVNI; // parent_'s value at the remat location. 156 explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {} 162 bool canRematerializeAt(Remat &RM, 173 const Remat &RM,
|
RegAllocPBQP.h | 75 // spill is a preg. (This might be extended one day to support remat).
|
VirtRegMap.h | 162 // stack slot or remat id.
|
MachineInstr.h | 545 /// remat. This flag is deprecated, please don't use it anymore. If this 556 /// optimizations (e.g., remat during two-address conversion or machine licm) 557 /// where we would like to remat or hoist the instruction, but not if it costs [all...] |
/external/llvm/test/CodeGen/X86/ |
remat-mov-0.ll | 4 ; CodeGen should remat the zero instead of spilling it.
|
coalescer-dce.ll | 5 ; This test case has a sub-register join followed by a remat: 19 ; Remat: %vreg10<def> = MOV64r0 %vreg10<imp-def>, %EFLAGS<imp-def,dead>, %vreg10<imp-def>; GR64:%vreg10
|
inline-asm-fpstack.ll | 100 ; A valid alternative would be to remat the constant pool load before each 119 ; A valid alternative would be to remat the constant pool load before each
|
remat-scalar-zero.ll | 8 ; Remat should be able to fold the zero constant into the div instructions
|
remat-fold-load.ll | 4 ; During coalescing, remat triggers DCE which deletes the penultimate use of a
|
crash.ll | 220 ; This test has dead code elimination caused by remat during spilling.
|
/external/llvm/lib/CodeGen/ |
Spiller.h | 22 /// Implementations are utility classes which insert spill or remat code on
|
LiveRangeEdit.cpp | 88 // We can't remat physreg uses, unless it is a constant. 112 bool LiveRangeEdit::canRematerializeAt(Remat &RM, 145 const Remat &RM, 148 assert(RM.OrigMI && "Invalid remat");
|
InlineSpiller.cpp | 80 // Values that failed to remat at some point. 610 // Potential remat candidate. 658 << VNI->def << " may remat from " << *DefMI); 680 // SpillReg may have been deleted by remat and DCE. 853 LiveRangeEdit::Remat RM(ParentVNI); 859 DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI); 870 DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << *MI); 883 // Alocate a new register for the remat. [all...] |
Spiller.cpp | 74 /// remat is attempted.
|
TargetInstrInfo.cpp | 441 // Remat clients assume operand 0 is the defined register. 462 // Avoid instructions obviously unsafe for remat. 467 // Don't remat inline asm. We have no idea how expensive it is 494 // A physreg def. We can't remat it.
|
MachineLICM.cpp | [all...] |
SplitKit.cpp | 442 LiveRangeEdit::Remat RM(ParentVNI); 447 // Can't remat, just insert a copy from parent. [all...] |
MachineInstr.cpp | [all...] |
RegisterCoalescer.cpp | 829 DEBUG(dbgs() << "Remat: " << *NewMI); [all...] |
/external/llvm/include/llvm/MC/ |
MCInstrDesc.h | 423 /// remat. This flag is deprecated, please don't use it anymore. If this 432 /// optimizations (e.g., remat during two-address conversion or machine licm) 433 /// where we would like to remat or hoist the instruction, but not if it costs
|
/external/llvm/lib/Target/X86/ |
README.txt | 759 This seems like a cross between remat and spill folding. 1007 This looks like a scheduling deficiency and lack of remat of the load from 1020 Note that it remat'd loads from 4(esp) and 12(esp). See this GCC PR: [all...] |
/external/llvm/lib/Target/ARM/ |
ARMInstrThumb2.td | [all...] |
ARMInstrInfo.td | [all...] |
/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
BitcodeReader.cpp | [all...] |