| /external/llvm/test/MC/ELF/ |
| relax-arith.s | 7 // CHECK: 'imul'
9 .section imul
10 imul $foo, %bx, %bx
11 imul $foo, bar, %bx
12 imul $foo, %ebx, %ebx
13 imul $foo, bar, %ebx
14 imul $foo, %rbx, %rbx
15 imul $foo, bar, %rbx
|
| /external/llvm/test/CodeGen/X86/ |
| imul-lea-2.ll | 3 ; CHECK-NOT: imul
|
| memset-2.ll | 37 ; CHECK-NOT: imul
|
| 2007-11-07-MulBy4.ll | 1 ; RUN: llc < %s -march=x86 | not grep imul
|
| loop-strength-reduce7.ll | 1 ; RUN: llc < %s -march=x86 | not grep imul
|
| /external/flac/libFLAC/ia32/ |
| lpc_asm.nasm | 783 imul eax, edx
813 imul eax, [esi + 4 * ecx]
845 imul ecx, [esi - 128]
848 imul ecx, [esi - 124]
851 imul ecx, [esi - 120]
854 imul ecx, [esi - 116]
857 imul ecx, [esi - 112]
860 imul ecx, [esi - 108]
863 imul ecx, [esi - 104]
866 imul ecx, [esi - 100
[all...] |
| /dalvik/dx/tests/102-verify-nonwide-math/ |
| op_imul.j | 24 imul
|
| run | 43 oneop imul
|
| expected.txt | 32 imul: expected failure occurred
|
| /dalvik/vm/mterp/x86/ |
| OP_MUL_LONG_2ADDR.S | 7 * is used by imul. We'll also spill rINST (ebx),
|
| /external/aac/libFDK/include/x86/ |
| fixmul_x86.h | 114 imul b
127 imul b
155 asm( "imul %2;\n"
168 asm ( "imul %2;"
|
| /external/srec/srec/cfront/ |
| himul32.h | 80 // The x86 imul instruction, given a single 32-bit operand, computes
83 // EAX, then IMUL, then take the high 32 bits (in EDX) and move them
89 imul factor2
|
| /external/v8/test/cctest/ |
| test-disasm-ia32.cc | 125 __ imul(edx, ecx);
180 __ imul(edx, Operand(ebx, ecx, times_4, 10000));
181 __ imul(edx, ecx, 12);
182 __ imul(edx, ecx, 1000);
236 __ imul(edx, ecx, 12);
237 __ imul(edx, ecx, 1000);
|
| test-disasm-x64.cc | 119 __ imul(rdx, rcx);
169 __ imul(rdx, Operand(rbx, rcx, times_4, 10000));
170 __ imul(rdx, rcx, Immediate(12));
171 __ imul(rdx, rcx, Immediate(1000));
222 __ imul(rdx, rcx, Immediate(12));
223 __ imul(rdx, rcx, Immediate(1000));
|
| /external/llvm/lib/Target/X86/ |
| X86InstrArithmetic.td | 113 def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", [],
117 def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w}\t$src", [],
121 def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l}\t$src", [],
125 def IMUL64r : RI<0xF7, MRM5r, (outs), (ins GR64:$src), "imul{q}\t$src", [],
132 "imul{b}\t$src", [], IIC_IMUL8>, SchedLoadReg<WriteIMulLd>;
136 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize,
141 "imul{l}\t$src", [], IIC_IMUL32_MEM>, SchedLoadReg<WriteIMulLd>;
145 "imul{q}\t$src", [], IIC_IMUL64>, SchedLoadReg<WriteIMulLd>;
154 // X = IMUL Y, Z --> X = IMUL Z,
[all...] |
| X86Schedule.td | 95 // imul by al, ax, eax, tax
102 // imul reg by reg|mem
109 // imul reg = reg/mem * imm
|
| /external/javassist/src/main/javassist/bytecode/ |
| Mnemonic.java | 142 "imul", /* 104*/
|
| Opcode.java | 155 int IMUL = 104;
348 -1, // imul, 104
|
| /external/quake/quake/src/QW/client/ |
| d_spr8.asm | 342 imul ds:dword ptr[_d_zrowbytes]
436 imul eax,ds:dword ptr[_cachewidth]
478 imul eax,ebx
684 imul ds:dword ptr[reciprocal_table-8+ecx*4]
687 imul ds:dword ptr[reciprocal_table-8+ecx*4]
697 imul edx,ebx
|
| d_draw.asm | 412 imul eax,edx
457 imul eax,ebx
597 imul ds:dword ptr[reciprocal_table-8+ecx*4]
600 imul ds:dword ptr[reciprocal_table-8+ecx*4]
609 imul edx,ebx
783 imul ecx,ds:dword ptr[_d_zrowbytes]
870 imul ecx,ds:dword ptr[_d_zrowbytes]
|
| snd_mixa.asm | 312 imul eax,esi
324 imul edx,esi
|
| /external/proguard/src/proguard/classfile/instruction/ |
| Instruction.java | 141 false, // imul
350 2, // imul
559 1, // imul
|
| /dalvik/dx/src/com/android/dx/cf/code/ |
| ValueAwareMachine.java | 90 case ByteOps.IMUL:
|
| /dalvik/dx/tests/032-bb-live-code/ |
| blort.j | 264 imul
|
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| encoder.h | 499 // multiply instructions: mul, imul
501 ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz = size_platf);
502 ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const Imm_Opnd & imm, Opnd_Size sz = size_platf);
503 ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const RM_Opnd & rm, const Imm_Opnd& imm, Opnd_Size sz = size_platf);
|
