1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __ASM_ARCH_MUX_H 20 #define __ASM_ARCH_MUX_H 21 #define PU_PD_SEL_NA 0 22 #define PULL_DWN_CTRL_NA 0 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode, 25 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status, 26 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status, 27 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode, 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status, 30 #define MUX_CFG(desc, mux_reg, mode_offset, mode, pull_reg, pull_bit, pull_status, pu_pd_reg, pu_pd_status, debug_status) { .name = desc, .debug = debug_status, MUX_REG(mux_reg, mode_offset, mode) PULL_REG(pull_reg, pull_bit, !pull_status) PU_PD_REG(pu_pd_reg, pu_pd_status) }, 31 #define MUX_CFG_730(desc, mux_reg, mode_offset, mode, pull_bit, pull_status, debug_status) { .name = desc, .debug = debug_status, MUX_REG_730(mux_reg, mode_offset, mode) PULL_REG_730(mux_reg, pull_bit, pull_status) PU_PD_REG(NA, 0) }, 32 #define MUX_CFG_24XX(desc, reg_offset, mode, pull_en, pull_mode, dbg) { .name = desc, .debug = dbg, .mux_reg = reg_offset, .mask = mode, .pull_val = pull_en, .pu_pd_val = pull_mode, }, 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define PULL_DISABLED 0 35 #define PULL_ENABLED 1 36 #define PULL_DOWN 0 37 #define PULL_UP 1 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 struct pin_config { 40 char *name; 41 unsigned char busy; 42 unsigned char debug; 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 const char *mux_reg_name; 45 const unsigned int mux_reg; 46 const unsigned char mask_offset; 47 const unsigned char mask; 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 const char *pull_name; 50 const unsigned int pull_reg; 51 const unsigned char pull_val; 52 const unsigned char pull_bit; 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 const char *pu_pd_name; 55 const unsigned int pu_pd_reg; 56 const unsigned char pu_pd_val; 57 }; 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 enum omap730_index { 60 E2_730_KBR0, 61 J7_730_KBR1, 62 E1_730_KBR2, 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 F3_730_KBR3, 65 D2_730_KBR4, 66 AA20_730_KBR5, 67 V17_730_KBR6, 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 C2_730_KBC0, 70 D3_730_KBC1, 71 E4_730_KBC2, 72 F4_730_KBC3, 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 E3_730_KBC4, 75 AA17_730_USB_DM, 76 W16_730_USB_PU_EN, 77 W17_730_USB_VBUSI, 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 V19_730_GPIO_15, 80 M19_730_GPIO_77, 81 C21_730_GPIO_121_122, 82 K19_730_GPIO_126, 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 K15_730_GPIO_127, 85 P15_730_GPIO_16_17, 86 M15_730_GPIO_83, 87 N20_730_GPIO_82, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 N18_730_GPIO_81, 90 N19_730_GPIO_80, 91 L15_730_GPIO_76, 92 UART1_CTS_RTS, 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 OMAP_730_GPIOS_42_43, 95 UART1_TX_RX, 96 OMAP_730_GPIOS_40_41, 97 UART1_USB_RX_TX, 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 UART1_USB_RTS, 100 UART1_USB_CTS 101 }; 102 enum omap1xxx_index { 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 UART1_TX = 0, 105 UART1_RTS, 106 UART2_TX, 107 UART2_RX, 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 UART2_CTS, 110 UART2_RTS, 111 UART3_TX, 112 UART3_RX, 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 UART3_CTS, 115 UART3_RTS, 116 UART3_CLKREQ, 117 UART3_BCLK, 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 Y15_1610_UART3_RTS, 120 PWT, 121 PWL, 122 R18_USB_VBUS, 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 R18_1510_USB_GPIO0, 125 W4_USB_PUEN, 126 W4_USB_CLKO, 127 W4_USB_HIGHZ, 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 W4_GPIO58, 130 USB1_SUSP, 131 USB1_SEO, 132 W13_1610_USB1_SE0, 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 USB1_TXEN, 135 USB1_TXD, 136 USB1_VP, 137 USB1_VM, 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 USB1_RCV, 140 USB1_SPEED, 141 R13_1610_USB1_SPEED, 142 R13_1710_USB1_SE0, 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 USB2_SUSP, 145 USB2_VP, 146 USB2_TXEN, 147 USB2_VM, 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 USB2_RCV, 150 USB2_SEO, 151 USB2_TXD, 152 R18_1510_GPIO0, 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 R19_1510_GPIO1, 155 M14_1510_GPIO2, 156 P18_1610_GPIO3, 157 Y15_1610_GPIO17, 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 R18_1710_GPIO0, 160 V2_1710_GPIO10, 161 N21_1710_GPIO14, 162 W15_1710_GPIO40, 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 MPUIO2, 165 N15_1610_MPUIO2, 166 MPUIO4, 167 MPUIO5, 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 T20_1610_MPUIO5, 170 W11_1610_MPUIO6, 171 V10_1610_MPUIO7, 172 W11_1610_MPUIO9, 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 V10_1610_MPUIO10, 175 W10_1610_MPUIO11, 176 E20_1610_MPUIO13, 177 U20_1610_MPUIO14, 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 E19_1610_MPUIO15, 180 MCBSP2_CLKR, 181 MCBSP2_CLKX, 182 MCBSP2_DR, 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 MCBSP2_DX, 185 MCBSP2_FSR, 186 MCBSP2_FSX, 187 MCBSP3_CLKX, 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 BALLOUT_V8_ARMIO3, 190 N20_HDQ, 191 W8_1610_MMC2_DAT0, 192 V8_1610_MMC2_DAT1, 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 W15_1610_MMC2_DAT2, 195 R10_1610_MMC2_DAT3, 196 Y10_1610_MMC2_CLK, 197 Y8_1610_MMC2_CMD, 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 V9_1610_MMC2_CMDDIR, 200 V5_1610_MMC2_DATDIR0, 201 W19_1610_MMC2_DATDIR1, 202 R18_1610_MMC2_CLKIN, 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 M19_1610_ETM_PSTAT0, 205 L15_1610_ETM_PSTAT1, 206 L18_1610_ETM_PSTAT2, 207 L19_1610_ETM_D0, 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 J19_1610_ETM_D6, 210 J18_1610_ETM_D7, 211 P20_1610_GPIO4, 212 V9_1610_GPIO7, 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 W8_1610_GPIO9, 215 N20_1610_GPIO11, 216 N19_1610_GPIO13, 217 P10_1610_GPIO22, 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 V5_1610_GPIO24, 220 AA20_1610_GPIO_41, 221 W19_1610_GPIO48, 222 M7_1610_GPIO62, 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 V14_16XX_GPIO37, 225 R9_16XX_GPIO18, 226 L14_16XX_GPIO49, 227 V19_1610_UWIRE_SCLK, 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 U18_1610_UWIRE_SDI, 230 W21_1610_UWIRE_SDO, 231 N14_1610_UWIRE_CS0, 232 P15_1610_UWIRE_CS3, 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 N15_1610_UWIRE_CS1, 235 U19_1610_SPIF_SCK, 236 U18_1610_SPIF_DIN, 237 P20_1610_SPIF_DIN, 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 W21_1610_SPIF_DOUT, 240 R18_1610_SPIF_DOUT, 241 N14_1610_SPIF_CS0, 242 N15_1610_SPIF_CS1, 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 T19_1610_SPIF_CS2, 245 P15_1610_SPIF_CS3, 246 L3_1610_FLASH_CS2B_OE, 247 M8_1610_FLASH_CS2B_WE, 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 MMC_CMD, 250 MMC_DAT1, 251 MMC_DAT2, 252 MMC_DAT0, 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 MMC_CLK, 255 MMC_DAT3, 256 M15_1710_MMC_CLKI, 257 P19_1710_MMC_CMDDIR, 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 P20_1710_MMC_DATDIR0, 260 W9_USB0_TXEN, 261 AA9_USB0_VP, 262 Y5_USB0_RCV, 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 R9_USB0_VM, 265 V6_USB0_TXD, 266 W5_USB0_SE0, 267 V9_USB0_SPEED, 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 V9_USB0_SUSP, 270 W9_USB2_TXEN, 271 AA9_USB2_VP, 272 Y5_USB2_RCV, 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 R9_USB2_VM, 275 V6_USB2_TXD, 276 W5_USB2_SE0, 277 R13_1610_UART1_TX, 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 V14_16XX_UART1_RX, 280 R14_1610_UART1_CTS, 281 AA15_1610_UART1_RTS, 282 R9_16XX_UART2_RX, 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 L14_16XX_UART3_RX, 285 I2C_SCL, 286 I2C_SDA, 287 F18_1610_KBC0, 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 D20_1610_KBC1, 290 D19_1610_KBC2, 291 E18_1610_KBC3, 292 C21_1610_KBC4, 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 G18_1610_KBR0, 295 F19_1610_KBR1, 296 H14_1610_KBR2, 297 E20_1610_KBR3, 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 E19_1610_KBR4, 300 N19_1610_KBR5, 301 T20_1610_LOW_PWR, 302 V5_1710_MCLK_ON, 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 V5_1710_MCLK_OFF, 305 R10_1610_MCLK_ON, 306 R10_1610_MCLK_OFF, 307 P11_1610_CF_CD2, 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 R11_1610_CF_IOIS16, 310 V10_1610_CF_IREQ, 311 W10_1610_CF_RESET, 312 W11_1610_CF_CD1, 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 }; 315 enum omap24xx_index { 316 M19_24XX_I2C1_SCL, 317 L15_24XX_I2C1_SDA, 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 J15_24XX_I2C2_SCL, 320 H19_24XX_I2C2_SDA, 321 W19_24XX_SYS_NIRQ, 322 W14_24XX_SYS_CLKOUT, 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 L3_GPMC_WAIT0, 325 N7_GPMC_WAIT1, 326 M1_GPMC_WAIT2, 327 P1_GPMC_WAIT3, 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 Y15_24XX_MCBSP2_CLKX, 330 R14_24XX_MCBSP2_FSX, 331 W15_24XX_MCBSP2_DR, 332 V15_24XX_MCBSP2_DX, 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 M21_242X_GPIO11, 335 AA10_242X_GPIO13, 336 AA6_242X_GPIO14, 337 AA4_242X_GPIO15, 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 Y11_242X_GPIO16, 340 AA12_242X_GPIO17, 341 AA8_242X_GPIO58, 342 Y20_24XX_GPIO60, 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 W4__24XX_GPIO74, 345 M15_24XX_GPIO92, 346 V14_24XX_GPIO117, 347 V4_242X_GPIO49, 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 W2_242X_GPIO50, 350 U4_242X_GPIO51, 351 V3_242X_GPIO52, 352 V2_242X_GPIO53, 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 V6_242X_GPIO53, 355 T4_242X_GPIO54, 356 Y4_242X_GPIO54, 357 T3_242X_GPIO55, 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 U2_242X_GPIO56, 360 AA10_242X_DMAREQ0, 361 AA6_242X_DMAREQ1, 362 E4_242X_DMAREQ2, 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 G4_242X_DMAREQ3, 365 D3_242X_DMAREQ4, 366 E3_242X_DMAREQ5, 367 P20_24XX_TSC_IRQ, 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 K15_24XX_UART3_TX, 370 K14_24XX_UART3_RX, 371 G19_24XX_MMC_CLKO, 372 H18_24XX_MMC_CMD, 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 F20_24XX_MMC_DAT0, 375 H14_24XX_MMC_DAT1, 376 E19_24XX_MMC_DAT2, 377 D19_24XX_MMC_DAT3, 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 F19_24XX_MMC_DAT_DIR0, 380 E20_24XX_MMC_DAT_DIR1, 381 F18_24XX_MMC_DAT_DIR2, 382 E18_24XX_MMC_DAT_DIR3, 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 G18_24XX_MMC_CMD_DIR, 385 H15_24XX_MMC_CLKI, 386 T19_24XX_KBR0, 387 R19_24XX_KBR1, 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 V18_24XX_KBR2, 390 M21_24XX_KBR3, 391 E5__24XX_KBR4, 392 M18_24XX_KBR5, 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 R20_24XX_KBC0, 395 M14_24XX_KBC1, 396 H19_24XX_KBC2, 397 V17_24XX_KBC3, 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 P21_24XX_KBC4, 400 L14_24XX_KBC5, 401 N19_24XX_KBC6, 402 B3__24XX_KBR5, 403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 AA4_24XX_KBC2, 405 B13_24XX_KBC6, 406 }; 407 #endif 408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409
