1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __ASM_MACE_H__ 20 #define __ASM_MACE_H__ 21 #define MACE_BASE 0x1f000000 22 struct mace_pci { 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 volatile unsigned int error_addr; 25 volatile unsigned int error; 26 #define MACEPCI_ERROR_MASTER_ABORT BIT(31) 27 #define MACEPCI_ERROR_TARGET_ABORT BIT(30) 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29) 30 #define MACEPCI_ERROR_RETRY_ERR BIT(28) 31 #define MACEPCI_ERROR_ILLEGAL_CMD BIT(27) 32 #define MACEPCI_ERROR_SYSTEM_ERR BIT(26) 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define MACEPCI_ERROR_INTERRUPT_TEST BIT(25) 35 #define MACEPCI_ERROR_PARITY_ERR BIT(24) 36 #define MACEPCI_ERROR_OVERRUN BIT(23) 37 #define MACEPCI_ERROR_RSVD BIT(22) 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define MACEPCI_ERROR_MEMORY_ADDR BIT(21) 40 #define MACEPCI_ERROR_CONFIG_ADDR BIT(20) 41 #define MACEPCI_ERROR_MASTER_ABORT_ADDR_VALID BIT(19) 42 #define MACEPCI_ERROR_TARGET_ABORT_ADDR_VALID BIT(18) 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define MACEPCI_ERROR_DATA_PARITY_ADDR_VALID BIT(17) 45 #define MACEPCI_ERROR_RETRY_ADDR_VALID BIT(16) 46 #define MACEPCI_ERROR_SIG_TABORT BIT(4) 47 #define MACEPCI_ERROR_DEVSEL_MASK 0xc0 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define MACEPCI_ERROR_DEVSEL_FAST 0 50 #define MACEPCI_ERROR_DEVSEL_MED 0x40 51 #define MACEPCI_ERROR_DEVSEL_SLOW 0x80 52 #define MACEPCI_ERROR_FBB BIT(1) 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define MACEPCI_ERROR_66MHZ BIT(0) 55 volatile unsigned int control; 56 #define MACEPCI_CONTROL_INT(x) BIT(x) 57 #define MACEPCI_CONTROL_INT_MASK 0xff 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define MACEPCI_CONTROL_SERR_ENA BIT(8) 60 #define MACEPCI_CONTROL_ARB_N6 BIT(9) 61 #define MACEPCI_CONTROL_PARITY_ERR BIT(10) 62 #define MACEPCI_CONTROL_MRMRA_ENA BIT(11) 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define MACEPCI_CONTROL_ARB_N3 BIT(12) 65 #define MACEPCI_CONTROL_ARB_N4 BIT(13) 66 #define MACEPCI_CONTROL_ARB_N5 BIT(14) 67 #define MACEPCI_CONTROL_PARK_LIU BIT(15) 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define MACEPCI_CONTROL_INV_INT(x) BIT(16+x) 70 #define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000 71 #define MACEPCI_CONTROL_OVERRUN_INT BIT(24) 72 #define MACEPCI_CONTROL_PARITY_INT BIT(25) 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define MACEPCI_CONTROL_SERR_INT BIT(26) 75 #define MACEPCI_CONTROL_IT_INT BIT(27) 76 #define MACEPCI_CONTROL_RE_INT BIT(28) 77 #define MACEPCI_CONTROL_DPED_INT BIT(29) 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define MACEPCI_CONTROL_TAR_INT BIT(30) 80 #define MACEPCI_CONTROL_MAR_INT BIT(31) 81 volatile unsigned int rev; 82 unsigned int _pad[0xcf8/4 - 4]; 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 volatile unsigned int config_addr; 85 union { 86 volatile unsigned char b[4]; 87 volatile unsigned short w[2]; 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 volatile unsigned int l; 90 } config_data; 91 }; 92 #define MACEPCI_LOW_MEMORY 0x1a000000 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define MACEPCI_LOW_IO 0x18000000 95 #define MACEPCI_SWAPPED_VIEW 0 96 #define MACEPCI_NATIVE_VIEW 0x40000000 97 #define MACEPCI_IO 0x80000000 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define MACEPCI_HI_MEMORY 0x280000000 100 #define MACEPCI_HI_IO 0x100000000 101 struct mace_video { 102 unsigned long xxx; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 }; 105 struct mace_ethernet { 106 volatile unsigned long mac_ctrl; 107 volatile unsigned long int_stat; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 volatile unsigned long dma_ctrl; 110 volatile unsigned long timer; 111 volatile unsigned long tx_int_al; 112 volatile unsigned long rx_int_al; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 volatile unsigned long tx_info; 115 volatile unsigned long tx_info_al; 116 volatile unsigned long rx_buff; 117 volatile unsigned long rx_buff_al1; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 volatile unsigned long rx_buff_al2; 120 volatile unsigned long diag; 121 volatile unsigned long phy_data; 122 volatile unsigned long phy_regs; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 volatile unsigned long phy_trans_go; 125 volatile unsigned long backoff_seed; 126 volatile unsigned long imq_reserved[4]; 127 volatile unsigned long mac_addr; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 volatile unsigned long mac_addr2; 130 volatile unsigned long mcast_filter; 131 volatile unsigned long tx_ring_base; 132 volatile unsigned long tx_pkt1_hdr; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 volatile unsigned long tx_pkt1_ptr[3]; 135 volatile unsigned long tx_pkt2_hdr; 136 volatile unsigned long tx_pkt2_ptr[3]; 137 volatile unsigned long rx_fifo; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 }; 140 struct mace_audio { 141 volatile unsigned long control; 142 volatile unsigned long codec_control; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 volatile unsigned long codec_mask; 145 volatile unsigned long codec_read; 146 struct { 147 volatile unsigned long control; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 volatile unsigned long read_ptr; 150 volatile unsigned long write_ptr; 151 volatile unsigned long depth; 152 } chan[3]; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 }; 155 struct mace_parport { 156 #define MACEPAR_CONTEXT_LASTFLAG BIT(63) 157 #define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL 160 #define MACEPAR_CONTEXT_DATALEN_SHIFT 32 161 #define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL 162 volatile u64 context_a; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 volatile u64 context_b; 165 #define MACEPAR_CTLSTAT_DIRECTION BIT(0) 166 #define MACEPAR_CTLSTAT_ENABLE BIT(1) 167 #define MACEPAR_CTLSTAT_RESET BIT(2) 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 #define MACEPAR_CTLSTAT_CTXB_VALID BIT(3) 170 #define MACEPAR_CTLSTAT_CTXA_VALID BIT(4) 171 volatile u64 cntlstat; 172 #define MACEPAR_DIAG_CTXINUSE BIT(0) 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 #define MACEPAR_DIAG_DMACTIVE BIT(1) 175 #define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL 176 #define MACEPAR_DIAG_CTRSHIFT 2 177 volatile u64 diagnostic; 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 }; 180 struct mace_isactrl { 181 volatile unsigned long ringbase; 182 #define MACEISA_RINGBUFFERS_SIZE (8 * 4096) 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 volatile unsigned long misc; 185 #define MACEISA_FLASH_WE BIT(0) 186 #define MACEISA_PWD_CLEAR BIT(1) 187 #define MACEISA_NIC_DEASSERT BIT(2) 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 #define MACEISA_NIC_DATA BIT(3) 190 #define MACEISA_LED_RED BIT(4) 191 #define MACEISA_LED_GREEN BIT(5) 192 #define MACEISA_DP_RAM_ENABLE BIT(6) 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 volatile unsigned long istat; 195 volatile unsigned long imask; 196 #define MACEISA_AUDIO_SW_INT BIT(0) 197 #define MACEISA_AUDIO_SC_INT BIT(1) 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 #define MACEISA_AUDIO1_DMAT_INT BIT(2) 200 #define MACEISA_AUDIO1_OF_INT BIT(3) 201 #define MACEISA_AUDIO2_DMAT_INT BIT(4) 202 #define MACEISA_AUDIO2_MERR_INT BIT(5) 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 #define MACEISA_AUDIO3_DMAT_INT BIT(6) 205 #define MACEISA_AUDIO3_MERR_INT BIT(7) 206 #define MACEISA_RTC_INT BIT(8) 207 #define MACEISA_KEYB_INT BIT(9) 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 #define MACEISA_KEYB_POLL_INT BIT(10) 210 #define MACEISA_MOUSE_INT BIT(11) 211 #define MACEISA_MOUSE_POLL_INT BIT(12) 212 #define MACEISA_TIMER0_INT BIT(13) 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 #define MACEISA_TIMER1_INT BIT(14) 215 #define MACEISA_TIMER2_INT BIT(15) 216 #define MACEISA_PARALLEL_INT BIT(16) 217 #define MACEISA_PAR_CTXA_INT BIT(17) 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 #define MACEISA_PAR_CTXB_INT BIT(18) 220 #define MACEISA_PAR_MERR_INT BIT(19) 221 #define MACEISA_SERIAL1_INT BIT(20) 222 #define MACEISA_SERIAL1_TDMAT_INT BIT(21) 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 #define MACEISA_SERIAL1_TDMAPR_INT BIT(22) 225 #define MACEISA_SERIAL1_TDMAME_INT BIT(23) 226 #define MACEISA_SERIAL1_RDMAT_INT BIT(24) 227 #define MACEISA_SERIAL1_RDMAOR_INT BIT(25) 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 #define MACEISA_SERIAL2_INT BIT(26) 230 #define MACEISA_SERIAL2_TDMAT_INT BIT(27) 231 #define MACEISA_SERIAL2_TDMAPR_INT BIT(28) 232 #define MACEISA_SERIAL2_TDMAME_INT BIT(29) 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 #define MACEISA_SERIAL2_RDMAT_INT BIT(30) 235 #define MACEISA_SERIAL2_RDMAOR_INT BIT(31) 236 volatile unsigned long _pad[0x2000/8 - 4]; 237 volatile unsigned long dp_ram[0x400]; 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 struct mace_parport parport; 240 }; 241 struct mace_ps2port { 242 volatile unsigned long tx; 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 volatile unsigned long rx; 245 volatile unsigned long control; 246 volatile unsigned long status; 247 }; 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 struct mace_ps2 { 250 struct mace_ps2port keyb; 251 struct mace_ps2port mouse; 252 }; 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 struct mace_i2c { 255 volatile unsigned long config; 256 #define MACEI2C_RESET BIT(0) 257 #define MACEI2C_FAST BIT(1) 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 #define MACEI2C_DATA_OVERRIDE BIT(2) 260 #define MACEI2C_CLOCK_OVERRIDE BIT(3) 261 #define MACEI2C_DATA_STATUS BIT(4) 262 #define MACEI2C_CLOCK_STATUS BIT(5) 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 volatile unsigned long control; 265 volatile unsigned long data; 266 }; 267 typedef union { 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 volatile unsigned long ust_msc; 270 struct reg { 271 volatile unsigned int ust; 272 volatile unsigned int msc; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 } reg; 275 } timer_reg; 276 struct mace_timers { 277 volatile unsigned long ust; 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 #define MACE_UST_PERIOD_NS 960 280 volatile unsigned long compare1; 281 volatile unsigned long compare2; 282 volatile unsigned long compare3; 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 timer_reg audio_in; 285 timer_reg audio_out1; 286 timer_reg audio_out2; 287 timer_reg video_in1; 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 timer_reg video_in2; 290 timer_reg video_out; 291 }; 292 struct mace_perif { 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 struct mace_audio audio; 295 char _pad0[0x10000 - sizeof(struct mace_audio)]; 296 struct mace_isactrl ctrl; 297 char _pad1[0x10000 - sizeof(struct mace_isactrl)]; 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 struct mace_ps2 ps2; 300 char _pad2[0x10000 - sizeof(struct mace_ps2)]; 301 struct mace_i2c i2c; 302 char _pad3[0x10000 - sizeof(struct mace_i2c)]; 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 struct mace_timers timers; 305 char _pad4[0x10000 - sizeof(struct mace_timers)]; 306 }; 307 struct mace_parallel { 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 }; 310 struct mace_ecp1284 { 311 }; 312 struct mace_serial { 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 volatile unsigned long xxx; 315 }; 316 struct mace_isa { 317 struct mace_parallel parallel; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 char _pad1[0x8000 - sizeof(struct mace_parallel)]; 320 struct mace_ecp1284 ecp1284; 321 char _pad2[0x8000 - sizeof(struct mace_ecp1284)]; 322 struct mace_serial serial1; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 char _pad3[0x8000 - sizeof(struct mace_serial)]; 325 struct mace_serial serial2; 326 char _pad4[0x8000 - sizeof(struct mace_serial)]; 327 volatile unsigned char rtc[0x10000]; 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 }; 330 struct sgi_mace { 331 char _reserved[0x80000]; 332 struct mace_pci pci; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 char _pad0[0x80000 - sizeof(struct mace_pci)]; 335 struct mace_video video_in1; 336 char _pad1[0x80000 - sizeof(struct mace_video)]; 337 struct mace_video video_in2; 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 char _pad2[0x80000 - sizeof(struct mace_video)]; 340 struct mace_video video_out; 341 char _pad3[0x80000 - sizeof(struct mace_video)]; 342 struct mace_ethernet eth; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 char _pad4[0x80000 - sizeof(struct mace_ethernet)]; 345 struct mace_perif perif; 346 char _pad5[0x80000 - sizeof(struct mace_perif)]; 347 struct mace_isa isa; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 char _pad6[0x80000 - sizeof(struct mace_isa)]; 350 }; 351 #endif 352
