1 //===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 //===----------------------------------------------------------------------===// 11 // Instruction format superclass 12 //===----------------------------------------------------------------------===// 13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern> 14 : Instruction { 15 field bits<32> Inst; 16 17 let Namespace = "XCore"; 18 dag OutOperandList = outs; 19 dag InOperandList = ins; 20 let AsmString = asmstr; 21 let Pattern = pattern; 22 let Size = sz; 23 field bits<32> SoftFail = 0; 24 } 25 26 // XCore pseudo instructions format 27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> 28 : InstXCore<0, outs, ins, asmstr, pattern> { 29 let isPseudo = 1; 30 } 31 32 //===----------------------------------------------------------------------===// 33 // Instruction formats 34 //===----------------------------------------------------------------------===// 35 36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 37 : InstXCore<2, outs, ins, asmstr, pattern> { 38 let Inst{15-11} = opc; 39 let DecoderMethod = "Decode3RInstruction"; 40 } 41 42 // 3R with first operand as an immediate. Used for TSETR where the first 43 // operand is treated as an immediate since it refers to a register number in 44 // another thread. 45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 46 : _F3R<opc, outs, ins, asmstr, pattern> { 47 let DecoderMethod = "Decode3RImmInstruction"; 48 } 49 50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 51 : InstXCore<4, outs, ins, asmstr, pattern> { 52 let Inst{31-27} = opc{8-4}; 53 let Inst{26-20} = 0b1111110; 54 let Inst{19-16} = opc{3-0}; 55 56 let Inst{15-11} = 0b11111; 57 let DecoderMethod = "DecodeL3RInstruction"; 58 } 59 60 // L3R with first operand as both a source and a destination. 61 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr, 62 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> { 63 let DecoderMethod = "DecodeL3RSrcDstInstruction"; 64 } 65 66 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 67 : InstXCore<2, outs, ins, asmstr, pattern> { 68 let Inst{15-11} = opc; 69 let DecoderMethod = "Decode2RUSInstruction"; 70 } 71 72 // 2RUS with bitp operand 73 class _F2RUSBitp<bits<5> opc, dag outs, dag ins, string asmstr, 74 list<dag> pattern> 75 : _F2RUS<opc, outs, ins, asmstr, pattern> { 76 let DecoderMethod = "Decode2RUSBitpInstruction"; 77 } 78 79 class _FL2RUS<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 80 : InstXCore<4, outs, ins, asmstr, pattern> { 81 let Inst{31-27} = opc{8-4}; 82 let Inst{26-20} = 0b1111110; 83 let Inst{19-16} = opc{3-0}; 84 85 let Inst{15-11} = 0b11111; 86 let DecoderMethod = "DecodeL2RUSInstruction"; 87 } 88 89 // L2RUS with bitp operand 90 class _FL2RUSBitp<bits<9> opc, dag outs, dag ins, string asmstr, 91 list<dag> pattern> 92 : _FL2RUS<opc, outs, ins, asmstr, pattern> { 93 let DecoderMethod = "DecodeL2RUSBitpInstruction"; 94 } 95 96 class _FRU6<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 97 : InstXCore<2, outs, ins, asmstr, pattern> { 98 bits<4> a; 99 bits<6> b; 100 101 let Inst{15-10} = opc; 102 let Inst{9-6} = a; 103 let Inst{5-0} = b; 104 } 105 106 class _FLRU6<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 107 : InstXCore<4, outs, ins, asmstr, pattern> { 108 bits<4> a; 109 bits<16> b; 110 111 let Inst{31-26} = opc; 112 let Inst{25-22} = a; 113 let Inst{21-16} = b{5-0}; 114 let Inst{15-10} = 0b111100; 115 let Inst{9-0} = b{15-6}; 116 } 117 118 class _FU6<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 119 : InstXCore<2, outs, ins, asmstr, pattern> { 120 bits<6> a; 121 122 let Inst{15-6} = opc; 123 let Inst{5-0} = a; 124 } 125 126 class _FLU6<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 127 : InstXCore<4, outs, ins, asmstr, pattern> { 128 bits<16> a; 129 130 let Inst{31-22} = opc; 131 let Inst{21-16} = a{5-0}; 132 let Inst{15-10} = 0b111100; 133 let Inst{9-0} = a{15-6}; 134 } 135 136 class _FU10<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 137 : InstXCore<2, outs, ins, asmstr, pattern> { 138 bits<10> a; 139 140 let Inst{15-10} = opc; 141 let Inst{9-0} = a; 142 } 143 144 class _FLU10<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 145 : InstXCore<4, outs, ins, asmstr, pattern> { 146 bits<20> a; 147 148 let Inst{31-26} = opc; 149 let Inst{25-16} = a{9-0}; 150 let Inst{15-10} = 0b111100; 151 let Inst{9-0} = a{19-10}; 152 } 153 154 class _F2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 155 : InstXCore<2, outs, ins, asmstr, pattern> { 156 let Inst{15-11} = opc{5-1}; 157 let Inst{4} = opc{0}; 158 let DecoderMethod = "Decode2RInstruction"; 159 } 160 161 // 2R with first operand as an immediate. Used for TSETMR where the first 162 // operand is treated as an immediate since it refers to a register number in 163 // another thread. 164 class _F2RImm<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 165 : _F2R<opc, outs, ins, asmstr, pattern> { 166 let DecoderMethod = "Decode2RImmInstruction"; 167 } 168 169 // 2R with first operand as both a source and a destination. 170 class _F2RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr, 171 list<dag> pattern> : _F2R<opc, outs, ins, asmstr, pattern> { 172 let DecoderMethod = "Decode2RSrcDstInstruction"; 173 } 174 175 // Same as 2R with last two operands swapped 176 class _FR2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 177 : _F2R<opc, outs, ins, asmstr, pattern> { 178 let DecoderMethod = "DecodeR2RInstruction"; 179 } 180 181 class _FRUS<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 182 : InstXCore<2, outs, ins, asmstr, pattern> { 183 let Inst{15-11} = opc{5-1}; 184 let Inst{4} = opc{0}; 185 let DecoderMethod = "DecodeRUSInstruction"; 186 } 187 188 // RUS with bitp operand 189 class _FRUSBitp<bits<6> opc, dag outs, dag ins, string asmstr, 190 list<dag> pattern> 191 : _FRUS<opc, outs, ins, asmstr, pattern> { 192 let DecoderMethod = "DecodeRUSBitpInstruction"; 193 } 194 195 // RUS with first operand as both a source and a destination and a bitp second 196 // operand 197 class _FRUSSrcDstBitp<bits<6> opc, dag outs, dag ins, string asmstr, 198 list<dag> pattern> 199 : _FRUS<opc, outs, ins, asmstr, pattern> { 200 let DecoderMethod = "DecodeRUSSrcDstBitpInstruction"; 201 } 202 203 class _FL2R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 204 : InstXCore<4, outs, ins, asmstr, pattern> { 205 let Inst{31-27} = opc{9-5}; 206 let Inst{26-20} = 0b1111110; 207 let Inst{19-16} = opc{4-1}; 208 209 let Inst{15-11} = 0b11111; 210 let Inst{4} = opc{0}; 211 let DecoderMethod = "DecodeL2RInstruction"; 212 } 213 214 // Same as L2R with last two operands swapped 215 class _FLR2R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 216 : _FL2R<opc, outs, ins, asmstr, pattern> { 217 let DecoderMethod = "DecodeLR2RInstruction"; 218 } 219 220 class _F1R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 221 : InstXCore<2, outs, ins, asmstr, pattern> { 222 bits<4> a; 223 224 let Inst{15-11} = opc{5-1}; 225 let Inst{10-5} = 0b111111; 226 let Inst{4} = opc{0}; 227 let Inst{3-0} = a; 228 } 229 230 class _F0R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 231 : InstXCore<2, outs, ins, asmstr, pattern> { 232 let Inst{15-11} = opc{9-5}; 233 let Inst{10-5} = 0b111111; 234 let Inst{4-0} = opc{4-0}; 235 } 236 237 class _FL4R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 238 : InstXCore<4, outs, ins, asmstr, pattern> { 239 bits<4> d; 240 241 let Inst{31-27} = opc{5-1}; 242 let Inst{26-21} = 0b111111; 243 let Inst{20} = opc{0}; 244 let Inst{19-16} = d; 245 let Inst{15-11} = 0b11111; 246 } 247 248 // L4R with 4th operand as both a source and a destination. 249 class _FL4RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr, 250 list<dag> pattern> 251 : _FL4R<opc, outs, ins, asmstr, pattern> { 252 let DecoderMethod = "DecodeL4RSrcDstInstruction"; 253 } 254 255 // L4R with 1st and 4th operand as both a source and a destination. 256 class _FL4RSrcDstSrcDst<bits<6> opc, dag outs, dag ins, string asmstr, 257 list<dag> pattern> 258 : _FL4R<opc, outs, ins, asmstr, pattern> { 259 let DecoderMethod = "DecodeL4RSrcDstSrcDstInstruction"; 260 } 261 262 class _FL5R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 263 : InstXCore<4, outs, ins, asmstr, pattern> { 264 let Inst{31-27} = opc{5-1}; 265 let Inst{20} = opc{0}; 266 let Inst{15-11} = 0b11111; 267 268 let DecoderMethod = "DecodeL5RInstruction"; 269 } 270 271 class _FL6R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 272 : InstXCore<4, outs, ins, asmstr, pattern> { 273 let Inst{31-27} = opc; 274 let Inst{15-11} = 0b11111; 275 276 let DecoderMethod = "DecodeL6RInstruction"; 277 } 278
