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      1 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
      2 ; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift     | FileCheck %s -check-prefix=CHECK-SWIFT
      3 
      4 define i32 @f1(i32 %a, i32 %b) {
      5 entry:
      6 ; CHECK-ARM: f1
      7 ; CHECK-ARM: __divsi3
      8 
      9 ; CHECK-SWIFT: f1
     10 ; CHECK-SWIFT: sdiv
     11         %tmp1 = sdiv i32 %a, %b         ; <i32> [#uses=1]
     12         ret i32 %tmp1
     13 }
     14 
     15 define i32 @f2(i32 %a, i32 %b) {
     16 entry:
     17 ; CHECK-ARM: f2
     18 ; CHECK-ARM: __udivsi3
     19 
     20 ; CHECK-SWIFT: f2
     21 ; CHECK-SWIFT: udiv
     22         %tmp1 = udiv i32 %a, %b         ; <i32> [#uses=1]
     23         ret i32 %tmp1
     24 }
     25 
     26 define i32 @f3(i32 %a, i32 %b) {
     27 entry:
     28 ; CHECK-ARM: f3
     29 ; CHECK-ARM: __modsi3
     30 
     31 ; CHECK-SWIFT: f3
     32 ; CHECK-SWIFT: sdiv
     33 ; CHECK-SWIFT: mls
     34         %tmp1 = srem i32 %a, %b         ; <i32> [#uses=1]
     35         ret i32 %tmp1
     36 }
     37 
     38 define i32 @f4(i32 %a, i32 %b) {
     39 entry:
     40 ; CHECK-ARM: f4
     41 ; CHECK-ARM: __umodsi3
     42 
     43 ; CHECK-SWIFT: f4
     44 ; CHECK-SWIFT: udiv
     45 ; CHECK-SWIFT: mls
     46         %tmp1 = urem i32 %a, %b         ; <i32> [#uses=1]
     47         ret i32 %tmp1
     48 }
     49 
     50