1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 3 4 define i32 @icmp_i16_signed(i16 %a, i16 %b) nounwind { 5 entry: 6 ; ARM: icmp_i16_signed 7 ; ARM: sxth r0, r0 8 ; ARM: sxth r1, r1 9 ; ARM: cmp r0, r1 10 ; THUMB: icmp_i16_signed 11 ; THUMB: sxth r0, r0 12 ; THUMB: sxth r1, r1 13 ; THUMB: cmp r0, r1 14 %cmp = icmp slt i16 %a, %b 15 %conv2 = zext i1 %cmp to i32 16 ret i32 %conv2 17 } 18 19 define i32 @icmp_i16_unsigned(i16 %a, i16 %b) nounwind { 20 entry: 21 ; ARM: icmp_i16_unsigned 22 ; ARM: uxth r0, r0 23 ; ARM: uxth r1, r1 24 ; ARM: cmp r0, r1 25 ; THUMB: icmp_i16_unsigned 26 ; THUMB: uxth r0, r0 27 ; THUMB: uxth r1, r1 28 ; THUMB: cmp r0, r1 29 %cmp = icmp ult i16 %a, %b 30 %conv2 = zext i1 %cmp to i32 31 ret i32 %conv2 32 } 33 34 define i32 @icmp_i8_signed(i8 %a, i8 %b) nounwind { 35 entry: 36 ; ARM: icmp_i8_signed 37 ; ARM: sxtb r0, r0 38 ; ARM: sxtb r1, r1 39 ; ARM: cmp r0, r1 40 ; THUMB: icmp_i8_signed 41 ; THUMB: sxtb r0, r0 42 ; THUMB: sxtb r1, r1 43 ; THUMB: cmp r0, r1 44 %cmp = icmp sgt i8 %a, %b 45 %conv2 = zext i1 %cmp to i32 46 ret i32 %conv2 47 } 48 49 define i32 @icmp_i8_unsigned(i8 %a, i8 %b) nounwind { 50 entry: 51 ; ARM: icmp_i8_unsigned 52 ; ARM: uxtb r0, r0 53 ; ARM: uxtb r1, r1 54 ; ARM: cmp r0, r1 55 ; THUMB: icmp_i8_unsigned 56 ; THUMB: uxtb r0, r0 57 ; THUMB: uxtb r1, r1 58 ; THUMB: cmp r0, r1 59 %cmp = icmp ugt i8 %a, %b 60 %conv2 = zext i1 %cmp to i32 61 ret i32 %conv2 62 } 63 64 define i32 @icmp_i1_unsigned(i1 %a, i1 %b) nounwind { 65 entry: 66 ; ARM: icmp_i1_unsigned 67 ; ARM: and r0, r0, #1 68 ; ARM: and r1, r1, #1 69 ; ARM: cmp r0, r1 70 ; THUMB: icmp_i1_unsigned 71 ; THUMB: and r0, r0, #1 72 ; THUMB: and r1, r1, #1 73 ; THUMB: cmp r0, r1 74 %cmp = icmp ult i1 %a, %b 75 %conv2 = zext i1 %cmp to i32 76 ret i32 %conv2 77 } 78
