1 ; RUN: llc < %s -mtriple=x86_64-apple-macosx -debug-only=pre-RA-sched \ 2 ; RUN: 2>&1 | FileCheck %s 3 ; REQUIRES: asserts 4 ; 5 ; rdar:13279013: pre-RA-sched should not check all interferences and 6 ; repush them on the ready queue after scheduling each instruction. 7 ; 8 ; CHECK: *** List Scheduling 9 ; CHECK: Interfering reg EFLAGS 10 ; CHECK: Repushing 11 ; CHECK: Repushing 12 ; CHECK: Repushing 13 ; CHECK-NOT: Repushing 14 ; CHECK: *** Final schedule 15 define i32 @test(i8* %pin) #0 { 16 %g0 = getelementptr inbounds i8* %pin, i64 0 17 %l0 = load i8* %g0, align 1 18 19 %g1a = getelementptr inbounds i8* %pin, i64 1 20 %l1a = load i8* %g1a, align 1 21 %z1a = zext i8 %l1a to i32 22 %g1b = getelementptr inbounds i8* %pin, i64 2 23 %l1b = load i8* %g1b, align 1 24 %z1b = zext i8 %l1b to i32 25 %c1 = icmp ne i8 %l0, 0 26 %x1 = xor i32 %z1a, %z1b 27 %s1 = select i1 %c1, i32 %z1a, i32 %x1 28 29 %g2a = getelementptr inbounds i8* %pin, i64 3 30 %l2a = load i8* %g2a, align 1 31 %z2a = zext i8 %l2a to i32 32 %g2b = getelementptr inbounds i8* %pin, i64 4 33 %l2b = load i8* %g2b, align 1 34 %z2b = zext i8 %l2b to i32 35 %x2 = xor i32 %z2a, %z2b 36 %s2 = select i1 %c1, i32 %z2a, i32 %x2 37 38 %g3a = getelementptr inbounds i8* %pin, i64 5 39 %l3a = load i8* %g3a, align 1 40 %z3a = zext i8 %l3a to i32 41 %g3b = getelementptr inbounds i8* %pin, i64 6 42 %l3b = load i8* %g3b, align 1 43 %z3b = zext i8 %l3b to i32 44 %x3 = xor i32 %z3a, %z3b 45 %s3 = select i1 %c1, i32 %z3a, i32 %x3 46 47 %c3 = icmp ne i8 %l1a, 0 48 %c4 = icmp ne i8 %l2a, 0 49 50 %s4 = select i1 %c3, i32 %s1, i32 %s2 51 %s5 = select i1 %c4, i32 %s4, i32 %s3 52 53 ret i32 %s5 54 } 55 56 attributes #0 = { nounwind ssp uwtable } 57
