1 ; RUN: llc < %s -march=x86 -mcpu=pentium4 -mattr=+sse2 | FileCheck %s -check-prefix=SSE2 2 ; RUN: llc < %s -march=x86 -mcpu=pentium4 -mattr=+sse3 | FileCheck %s -check-prefix=SSE3 3 4 define void @test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) nounwind { 5 %tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0 ; <<4 x float>> [#uses=1] 6 %tmp2 = insertelement <4 x float> %tmp, float %X, i32 1 ; <<4 x float>> [#uses=1] 7 %tmp4 = insertelement <4 x float> %tmp2, float %X, i32 2 ; <<4 x float>> [#uses=1] 8 %tmp6 = insertelement <4 x float> %tmp4, float %X, i32 3 ; <<4 x float>> [#uses=1] 9 %tmp8 = load <4 x float>* %Q ; <<4 x float>> [#uses=1] 10 %tmp10 = fmul <4 x float> %tmp8, %tmp6 ; <<4 x float>> [#uses=1] 11 store <4 x float> %tmp10, <4 x float>* %P 12 ret void 13 14 ; SSE2: test_v4sf: 15 ; SSE2: pshufd $0 16 17 ; SSE3: test_v4sf: 18 ; SSE3: pshufd $0 19 } 20 21 define void @test_v2sd(<2 x double>* %P, <2 x double>* %Q, double %X) nounwind { 22 %tmp = insertelement <2 x double> zeroinitializer, double %X, i32 0 ; <<2 x double>> [#uses=1] 23 %tmp2 = insertelement <2 x double> %tmp, double %X, i32 1 ; <<2 x double>> [#uses=1] 24 %tmp4 = load <2 x double>* %Q ; <<2 x double>> [#uses=1] 25 %tmp6 = fmul <2 x double> %tmp4, %tmp2 ; <<2 x double>> [#uses=1] 26 store <2 x double> %tmp6, <2 x double>* %P 27 ret void 28 29 ; SSE2: test_v2sd: 30 ; SSE2: shufpd $0 31 32 ; SSE3: test_v2sd: 33 ; SSE3: movddup 34 } 35
