1 .file "x86cpuid.s" 2 .text 3 .globl OPENSSL_ia32_cpuid 4 .type OPENSSL_ia32_cpuid,@function 5 .align 16 6 OPENSSL_ia32_cpuid: 7 .L_OPENSSL_ia32_cpuid_begin: 8 pushl %ebp 9 pushl %ebx 10 pushl %esi 11 pushl %edi 12 xorl %edx,%edx 13 pushfl 14 popl %eax 15 movl %eax,%ecx 16 xorl $2097152,%eax 17 pushl %eax 18 popfl 19 pushfl 20 popl %eax 21 xorl %eax,%ecx 22 xorl %eax,%eax 23 btl $21,%ecx 24 jnc .L000nocpuid 25 .byte 0x0f,0xa2 26 movl %eax,%edi 27 xorl %eax,%eax 28 cmpl $1970169159,%ebx 29 setne %al 30 movl %eax,%ebp 31 cmpl $1231384169,%edx 32 setne %al 33 orl %eax,%ebp 34 cmpl $1818588270,%ecx 35 setne %al 36 orl %eax,%ebp 37 jz .L001intel 38 cmpl $1752462657,%ebx 39 setne %al 40 movl %eax,%esi 41 cmpl $1769238117,%edx 42 setne %al 43 orl %eax,%esi 44 cmpl $1145913699,%ecx 45 setne %al 46 orl %eax,%esi 47 jnz .L001intel 48 movl $2147483648,%eax 49 .byte 0x0f,0xa2 50 cmpl $2147483649,%eax 51 jb .L001intel 52 movl %eax,%esi 53 movl $2147483649,%eax 54 .byte 0x0f,0xa2 55 orl %ecx,%ebp 56 andl $2049,%ebp 57 cmpl $2147483656,%esi 58 jb .L001intel 59 movl $2147483656,%eax 60 .byte 0x0f,0xa2 61 movzbl %cl,%esi 62 incl %esi 63 movl $1,%eax 64 .byte 0x0f,0xa2 65 btl $28,%edx 66 jnc .L002generic 67 shrl $16,%ebx 68 andl $255,%ebx 69 cmpl %esi,%ebx 70 ja .L002generic 71 andl $4026531839,%edx 72 jmp .L002generic 73 .L001intel: 74 cmpl $4,%edi 75 movl $-1,%edi 76 jb .L003nocacheinfo 77 movl $4,%eax 78 movl $0,%ecx 79 .byte 0x0f,0xa2 80 movl %eax,%edi 81 shrl $14,%edi 82 andl $4095,%edi 83 .L003nocacheinfo: 84 movl $1,%eax 85 .byte 0x0f,0xa2 86 andl $3220176895,%edx 87 cmpl $0,%ebp 88 jne .L004notintel 89 orl $1073741824,%edx 90 andb $15,%ah 91 cmpb $15,%ah 92 jne .L004notintel 93 orl $1048576,%edx 94 .L004notintel: 95 btl $28,%edx 96 jnc .L002generic 97 andl $4026531839,%edx 98 cmpl $0,%edi 99 je .L002generic 100 orl $268435456,%edx 101 shrl $16,%ebx 102 cmpb $1,%bl 103 ja .L002generic 104 andl $4026531839,%edx 105 .L002generic: 106 andl $2048,%ebp 107 andl $4294965247,%ecx 108 movl %edx,%esi 109 orl %ecx,%ebp 110 btl $27,%ecx 111 jnc .L005clear_avx 112 xorl %ecx,%ecx 113 .byte 15,1,208 114 andl $6,%eax 115 cmpl $6,%eax 116 je .L006done 117 cmpl $2,%eax 118 je .L005clear_avx 119 .L007clear_xmm: 120 andl $4261412861,%ebp 121 andl $4278190079,%esi 122 .L005clear_avx: 123 andl $4026525695,%ebp 124 .L006done: 125 movl %esi,%eax 126 movl %ebp,%edx 127 .L000nocpuid: 128 popl %edi 129 popl %esi 130 popl %ebx 131 popl %ebp 132 ret 133 .size OPENSSL_ia32_cpuid,.-.L_OPENSSL_ia32_cpuid_begin 134 .globl OPENSSL_rdtsc 135 .type OPENSSL_rdtsc,@function 136 .align 16 137 OPENSSL_rdtsc: 138 .L_OPENSSL_rdtsc_begin: 139 xorl %eax,%eax 140 xorl %edx,%edx 141 call .L008PIC_me_up 142 .L008PIC_me_up: 143 popl %ecx 144 leal _GLOBAL_OFFSET_TABLE_+[.-.L008PIC_me_up](%ecx),%ecx 145 movl OPENSSL_ia32cap_P@GOT(%ecx),%ecx 146 btl $4,(%ecx) 147 jnc .L009notsc 148 .byte 0x0f,0x31 149 .L009notsc: 150 ret 151 .size OPENSSL_rdtsc,.-.L_OPENSSL_rdtsc_begin 152 .globl OPENSSL_instrument_halt 153 .type OPENSSL_instrument_halt,@function 154 .align 16 155 OPENSSL_instrument_halt: 156 .L_OPENSSL_instrument_halt_begin: 157 call .L010PIC_me_up 158 .L010PIC_me_up: 159 popl %ecx 160 leal _GLOBAL_OFFSET_TABLE_+[.-.L010PIC_me_up](%ecx),%ecx 161 movl OPENSSL_ia32cap_P@GOT(%ecx),%ecx 162 btl $4,(%ecx) 163 jnc .L011nohalt 164 .long 2421723150 165 andl $3,%eax 166 jnz .L011nohalt 167 pushfl 168 popl %eax 169 btl $9,%eax 170 jnc .L011nohalt 171 .byte 0x0f,0x31 172 pushl %edx 173 pushl %eax 174 hlt 175 .byte 0x0f,0x31 176 subl (%esp),%eax 177 sbbl 4(%esp),%edx 178 addl $8,%esp 179 ret 180 .L011nohalt: 181 xorl %eax,%eax 182 xorl %edx,%edx 183 ret 184 .size OPENSSL_instrument_halt,.-.L_OPENSSL_instrument_halt_begin 185 .globl OPENSSL_far_spin 186 .type OPENSSL_far_spin,@function 187 .align 16 188 OPENSSL_far_spin: 189 .L_OPENSSL_far_spin_begin: 190 pushfl 191 popl %eax 192 btl $9,%eax 193 jnc .L012nospin 194 movl 4(%esp),%eax 195 movl 8(%esp),%ecx 196 .long 2430111262 197 xorl %eax,%eax 198 movl (%ecx),%edx 199 jmp .L013spin 200 .align 16 201 .L013spin: 202 incl %eax 203 cmpl (%ecx),%edx 204 je .L013spin 205 .long 529567888 206 ret 207 .L012nospin: 208 xorl %eax,%eax 209 xorl %edx,%edx 210 ret 211 .size OPENSSL_far_spin,.-.L_OPENSSL_far_spin_begin 212 .globl OPENSSL_wipe_cpu 213 .type OPENSSL_wipe_cpu,@function 214 .align 16 215 OPENSSL_wipe_cpu: 216 .L_OPENSSL_wipe_cpu_begin: 217 xorl %eax,%eax 218 xorl %edx,%edx 219 call .L014PIC_me_up 220 .L014PIC_me_up: 221 popl %ecx 222 leal _GLOBAL_OFFSET_TABLE_+[.-.L014PIC_me_up](%ecx),%ecx 223 movl OPENSSL_ia32cap_P@GOT(%ecx),%ecx 224 movl (%ecx),%ecx 225 btl $1,(%ecx) 226 jnc .L015no_x87 227 .long 4007259865,4007259865,4007259865,4007259865,2430851995 228 .L015no_x87: 229 leal 4(%esp),%eax 230 ret 231 .size OPENSSL_wipe_cpu,.-.L_OPENSSL_wipe_cpu_begin 232 .globl OPENSSL_atomic_add 233 .type OPENSSL_atomic_add,@function 234 .align 16 235 OPENSSL_atomic_add: 236 .L_OPENSSL_atomic_add_begin: 237 movl 4(%esp),%edx 238 movl 8(%esp),%ecx 239 pushl %ebx 240 nop 241 movl (%edx),%eax 242 .L016spin: 243 leal (%eax,%ecx,1),%ebx 244 nop 245 .long 447811568 246 jne .L016spin 247 movl %ebx,%eax 248 popl %ebx 249 ret 250 .size OPENSSL_atomic_add,.-.L_OPENSSL_atomic_add_begin 251 .globl OPENSSL_indirect_call 252 .type OPENSSL_indirect_call,@function 253 .align 16 254 OPENSSL_indirect_call: 255 .L_OPENSSL_indirect_call_begin: 256 pushl %ebp 257 movl %esp,%ebp 258 subl $28,%esp 259 movl 12(%ebp),%ecx 260 movl %ecx,(%esp) 261 movl 16(%ebp),%edx 262 movl %edx,4(%esp) 263 movl 20(%ebp),%eax 264 movl %eax,8(%esp) 265 movl 24(%ebp),%eax 266 movl %eax,12(%esp) 267 movl 28(%ebp),%eax 268 movl %eax,16(%esp) 269 movl 32(%ebp),%eax 270 movl %eax,20(%esp) 271 movl 36(%ebp),%eax 272 movl %eax,24(%esp) 273 call *8(%ebp) 274 movl %ebp,%esp 275 popl %ebp 276 ret 277 .size OPENSSL_indirect_call,.-.L_OPENSSL_indirect_call_begin 278 .globl OPENSSL_cleanse 279 .type OPENSSL_cleanse,@function 280 .align 16 281 OPENSSL_cleanse: 282 .L_OPENSSL_cleanse_begin: 283 movl 4(%esp),%edx 284 movl 8(%esp),%ecx 285 xorl %eax,%eax 286 cmpl $7,%ecx 287 jae .L017lot 288 cmpl $0,%ecx 289 je .L018ret 290 .L019little: 291 movb %al,(%edx) 292 subl $1,%ecx 293 leal 1(%edx),%edx 294 jnz .L019little 295 .L018ret: 296 ret 297 .align 16 298 .L017lot: 299 testl $3,%edx 300 jz .L020aligned 301 movb %al,(%edx) 302 leal -1(%ecx),%ecx 303 leal 1(%edx),%edx 304 jmp .L017lot 305 .L020aligned: 306 movl %eax,(%edx) 307 leal -4(%ecx),%ecx 308 testl $-4,%ecx 309 leal 4(%edx),%edx 310 jnz .L020aligned 311 cmpl $0,%ecx 312 jne .L019little 313 ret 314 .size OPENSSL_cleanse,.-.L_OPENSSL_cleanse_begin 315 .globl OPENSSL_ia32_rdrand 316 .type OPENSSL_ia32_rdrand,@function 317 .align 16 318 OPENSSL_ia32_rdrand: 319 .L_OPENSSL_ia32_rdrand_begin: 320 movl $8,%ecx 321 .L021loop: 322 .byte 15,199,240 323 jc .L022break 324 loop .L021loop 325 .L022break: 326 cmpl $0,%eax 327 cmovel %ecx,%eax 328 ret 329 .size OPENSSL_ia32_rdrand,.-.L_OPENSSL_ia32_rdrand_begin 330 .comm OPENSSL_ia32cap_P,8,4 331 .section .init 332 call OPENSSL_cpuid_setup 333
