/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 188 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.h | 480 void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
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SelectionDAGDumper.cpp | 164 case ISD::UREM: return "urem";
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FastISel.cpp | 420 // Transform "urem x, pow2" -> "and x, pow2-1". 421 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && [all...] |
LegalizeVectorOps.cpp | 199 case ISD::UREM:
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LegalizeVectorTypes.cpp | 111 case ISD::UREM: 569 case ISD::UREM: [all...] |
SelectionDAG.cpp | [all...] |
LegalizeIntegerTypes.cpp | 113 case ISD::UREM: Res = PromoteIntRes_UDIV(N); break; [all...] |
LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
AMDGPUISelLowering.cpp | 65 setOperationAction(ISD::UREM, MVT::i32, Expand);
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AMDILISelLowering.cpp | 108 // TODO: Implement custom UREM/SREM routines 628 SDValue r20 = DAG.getNode(ISD::UREM, DL, OVT, r0, r1);
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R600ISelLowering.cpp | 50 setOperationAction(ISD::UREM, MVT::v4i32, Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 770 case ISD::UREM: [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 156 setOperationAction(ISD::UREM, MVT::i8, Expand); 162 setOperationAction(ISD::UREM, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 102 setOperationAction(ISD::UREM, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 716 setOperationAction(ISD::UREM, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 127 setOperationAction(ISD::UREM, MVT::i32, Expand); 128 setOperationAction(ISD::UREM, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 273 setOperationAction(ISD::UREM, MVT::i32, Expand); 277 setOperationAction(ISD::UREM, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 119 // PowerPC has no SREM/UREM instructions 121 setOperationAction(ISD::UREM, MVT::i32, Expand); 123 setOperationAction(ISD::UREM, MVT::i64, Expand); 125 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM. 352 setOperationAction(ISD::UREM, VT, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 148 setOperationAction(ISD::UREM, VT, Expand); 685 setOperationAction(ISD::UREM, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 368 setOperationAction(ISD::UREM, VT, Expand); [all...] |