| /external/llvm/lib/Target/ARM/ |
| ARMRegisterInfo.td | 191 // know how to spill them. If we make our prologue/epilogue code smarter at
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 12 // allocation, but because we have a spill in between the feeder and new value
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| /external/llvm/lib/Target/X86/ |
| README.txt | 631 Leaf functions that require one 4-byte spill slot have a prolog like this:
759 This seems like a cross between remat and spill folding.
1052 Since we 'know' that this is a 'neg', we can actually "fold" the spill into
1212 enough to warrant the spill.
[all...] |
| X86RegisterInfo.td | 392 // values, though they really are f80 values. This will cause us to spill
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| README-SSE.txt | 299 The basic idea is that a reload from a spill slot, can, if only one 4-byte
555 At that point we don't know, whether there will be vector spill, or not.
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| /external/llvm/test/CodeGen/Mips/ |
| ra-allocatable.ll | 96 ; CHECK: sw $ra, {{[0-9]+}}($sp) # 4-byte Folded Spill
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| /external/llvm/test/CodeGen/X86/ |
| 2009-03-23-MultiUseSched.ll | 3 ; RUN: not grep spill %t
|
| /external/v8/src/ |
| flag-definitions.h | 542 "report heap spill statistics along with heap_stats "
|
| objects-debug.cc | 842 PrintF("\n JSObject Spill Statistics (#%d):\n", number_of_objects_);
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| /external/valgrind/main/VEX/priv/ |
| host_arm_defs.h | 609 generate spill/reload of 128-bit registers since current register
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| /external/valgrind/main/memcheck/tests/ |
| wrap6.c | 20 /* to spill is quite difficult, requiring v > 28 or so. */ \
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| /external/webkit/Source/WebCore/rendering/ |
| RenderBlockLineLayout.cpp | 379 // In particular with RTL blocks, wide lines should still spill out to the left.
394 // Wide lines spill out of the block based off direction.
[all...] |
| /prebuilts/gcc/darwin-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
| cfgloop.h | 648 /* The cost for register when we need to spill. */
|
| /prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
| cfgloop.h | 648 /* The cost for register when we need to spill. */
|
| /prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
| cfgloop.h | 648 /* The cost for register when we need to spill. */
|
| /prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
| cfgloop.h | 648 /* The cost for register when we need to spill. */
|
| /external/llvm/docs/ |
| CodeGenerator.rst | 135 target. This phase introduces spill code and eliminates all virtual register
140 LLVM alloca's and spill slots), the prolog and epilog code for the function
146 machine code can go here, such as spill code scheduling and peephole
300 entry to the first location where function data (local variables, spill
[all...] |
| /packages/apps/Settings/res/values-nb/ |
| strings.xml | [all...] |
| /external/llvm/lib/CodeGen/ |
| MachineVerifier.cpp | [all...] |
| TargetLoweringBase.cpp | 848 // Find the first legal register class with the largest spill size.
852 // We want the largest possible spill size.
[all...] |
| /external/v8/src/arm/ |
| lithium-arm.cc | 506 // spill slots.
[all...] |
| /external/v8/src/ia32/ |
| lithium-ia32.cc | 501 // spill slots.
[all...] |
| /external/v8/src/mips/ |
| lithium-mips.cc | 506 // spill slots.
[all...] |
| /external/v8/src/x64/ |
| lithium-x64.cc | 499 // spill slots.
[all...] |
| /dalvik/vm/compiler/codegen/x86/ |
| Lower.h | 38 /*! remove redundant spill of virtual registers */
[all...] |
