| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 597 case X86::R8: case X86::R9: case X86::R10: case X86::R11:
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 135 case ARM::R11:
|
| ARMBaseRegisterInfo.cpp | 49 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11),
502 // ARM and Thumb2 functions also need to consider R8-R11 and D8-D15
|
| ARMFrameLowering.cpp | 190 case ARM::R11:
218 // into spill area 1, including the FP in R11. In either case, it is
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-amd64-linux.c | 348 SC2(r11,R11);
581 tst->arch.vex.guest_R11 = sc->r11;
|
| /external/v8/src/ |
| platform-linux.cc | 957 enum ArmRegisters {R15 = 15, R13 = 13, R11 = 11};
1060 sample->fp = reinterpret_cast<Address>(mcontext.gregs[R11]);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 104 X86::R8, X86::R9, X86::R10, X86::R11, 0
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 104 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
|
| /external/valgrind/main/memcheck/ |
| mc_machine.c | 576 if (o == GOF(R11) && is1248) return o;
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/strace/ |
| process.c | [all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
