| /dalvik/vm/compiler/codegen/x86/ |
| LowerMove.cpp | 34 get_virtual_reg(vB, OpndSize_32, 1, false/*isPhysical*/);
46 get_virtual_reg(vB, OpndSize_32, 1, false);
58 get_virtual_reg(vB, OpndSize_32, 1, false);
70 get_virtual_reg(vB, OpndSize_64, 1, false);
81 get_virtual_reg(vB, OpndSize_64, 1, false);
92 get_virtual_reg(vB, OpndSize_64, 1, false);
|
| LowerGetPut.cpp | 44 get_virtual_reg(vref, OpndSize_32, 1, false); //array
45 get_virtual_reg(vindex, OpndSize_32, 2, false); //index
195 get_virtual_reg(vref, OpndSize_32, 1, false); //array
196 get_virtual_reg(vindex, OpndSize_32, 2, false); //index
218 get_virtual_reg(vA, OpndSize_64, 1, false);
221 get_virtual_reg(vA, OpndSize_32, 4, false);
339 get_virtual_reg(vref, OpndSize_32, 1, false); //array
350 get_virtual_reg(vindex, OpndSize_32, 2, false); //index
361 get_virtual_reg(vA, OpndSize_32, 4, false);
463 get_virtual_reg(vB, OpndSize_32, 7, false)
[all...] |
| LowerInvoke.cpp | 94 get_virtual_reg(vD, OpndSize_32, 5, false);
197 get_virtual_reg(vD, OpndSize_32, 5, false);
283 get_virtual_reg(vD, OpndSize_32, 1, false);
543 get_virtual_reg(vA, OpndSize_32, 22, false);
548 get_virtual_reg(vG, OpndSize_32, 23, false);
553 get_virtual_reg(vF, OpndSize_32, 24, false);
558 get_virtual_reg(vE, OpndSize_32, 25, false);
563 get_virtual_reg(vD, OpndSize_32, 26, false);
629 get_virtual_reg(vD, OpndSize_32, 22, false);
633 get_virtual_reg(vD+1, OpndSize_32, 23, false)
[all...] |
| LowerAlu.cpp | 35 get_virtual_reg(vB, OpndSize_32, 1, false);
47 get_virtual_reg(vB, OpndSize_32, 1, false);
60 get_virtual_reg(vB, OpndSize_64, 1, false);
73 get_virtual_reg(vB, OpndSize_64, 1, false);
87 get_virtual_reg(vB, OpndSize_32, 1, false);
101 get_virtual_reg(vB, OpndSize_64, 1, false);
115 get_virtual_reg(vB, OpndSize_32, PhysicalReg_EAX, true);
195 get_virtual_reg(vB, OpndSize_32, 1, false);
392 get_virtual_reg(vB, OpndSize_32, 1, false);
405 get_virtual_reg(vB, OpndSize_32, 1, false)
[all...] |
| LowerObject.cpp | 36 get_virtual_reg(vA, OpndSize_32, 1, false); //object
209 get_virtual_reg(vA, OpndSize_32, 1, false);
263 get_virtual_reg(vA, OpndSize_32, 1, false);
300 get_virtual_reg(vB, OpndSize_32, 1, false);
397 get_virtual_reg(vB, OpndSize_32, 5, false);
524 get_virtual_reg(v1, OpndSize_32, 7, false);
529 get_virtual_reg(v2, OpndSize_32, 8, false);
534 get_virtual_reg(v3, OpndSize_32, 9, false);
539 get_virtual_reg(v4, OpndSize_32, 10, false);
544 get_virtual_reg(v5, OpndSize_32, 11, false)
[all...] |
| LowerReturn.cpp | 128 get_virtual_reg(vA, OpndSize_32, 22, false);
143 get_virtual_reg(vA, OpndSize_64, 1, false);
|
| LowerJump.cpp | [all...] |
| CodegenInterface.cpp | 796 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true);
798 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, P_GPR_2, true);
835 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true);
837 get_virtual_reg(mir->dalvikInsn.vB, OpndSize_32, P_GPR_2, true);
864 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true); //array
876 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, PhysicalReg_EBX, true);
884 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, 5, false);
[all...] |
| AnalysisO1.h | 231 bool shareWithVR; //for temp. regs updated by get_virtual_reg
|
| Lower.h | 768 void get_virtual_reg(u2 vB, OpndSize size, int reg, bool isPhysical);
[all...] |
| AnalysisO1.cpp | [all...] |
| LowerHelper.cpp | 1788 void get_virtual_reg(u2 vB, OpndSize size, int reg, bool isPhysical) { function
[all...] |
