1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __ASM_ARCH_OMAP15XX_IRQS_H 20 #define __ASM_ARCH_OMAP15XX_IRQS_H 21 #define INT_CAMERA 1 22 #define INT_FIQ 3 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define INT_RTDX 6 25 #define INT_DSP_MMU_ABORT 7 26 #define INT_HOST 8 27 #define INT_ABORT 9 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define INT_DSP_MAILBOX1 10 30 #define INT_DSP_MAILBOX2 11 31 #define INT_BRIDGE_PRIV 13 32 #define INT_GPIO_BANK1 14 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define INT_UART3 15 35 #define INT_TIMER3 16 36 #define INT_DMA_CH0_6 19 37 #define INT_DMA_CH1_7 20 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define INT_DMA_CH2_8 21 40 #define INT_DMA_CH3 22 41 #define INT_DMA_CH4 23 42 #define INT_DMA_CH5 24 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define INT_DMA_LCD 25 45 #define INT_TIMER1 26 46 #define INT_WD_TIMER 27 47 #define INT_BRIDGE_PUB 28 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define INT_TIMER2 30 50 #define INT_LCD_CTRL 31 51 #define INT_1510_IH2_IRQ 0 52 #define INT_1510_RES2 2 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define INT_1510_SPI_TX 4 55 #define INT_1510_SPI_RX 5 56 #define INT_1510_RES12 12 57 #define INT_1510_LB_MMU 17 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define INT_1510_RES18 18 60 #define INT_1510_LOCAL_BUS 29 61 #define INT_1610_IH2_IRQ 0 62 #define INT_1610_IH2_FIQ 2 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define INT_1610_McBSP2_TX 4 65 #define INT_1610_McBSP2_RX 5 66 #define INT_1610_LCD_LINE 12 67 #define INT_1610_GPTIMER1 17 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define INT_1610_GPTIMER2 18 70 #define INT_1610_SSR_FIFO_0 29 71 #define INT_730_IH2_FIQ 0 72 #define INT_730_IH2_IRQ 1 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define INT_730_USB_NON_ISO 2 75 #define INT_730_USB_ISO 3 76 #define INT_730_ICR 4 77 #define INT_730_EAC 5 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define INT_730_GPIO_BANK1 6 80 #define INT_730_GPIO_BANK2 7 81 #define INT_730_GPIO_BANK3 8 82 #define INT_730_McBSP2TX 10 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 #define INT_730_McBSP2RX 11 85 #define INT_730_McBSP2RX_OVF 12 86 #define INT_730_LCD_LINE 14 87 #define INT_730_GSM_PROTECT 15 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 #define INT_730_TIMER3 16 90 #define INT_730_GPIO_BANK5 17 91 #define INT_730_GPIO_BANK6 18 92 #define INT_730_SPGIO_WR 29 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define IH2_BASE 32 95 #define INT_KEYBOARD (1 + IH2_BASE) 96 #define INT_uWireTX (2 + IH2_BASE) 97 #define INT_uWireRX (3 + IH2_BASE) 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define INT_I2C (4 + IH2_BASE) 100 #define INT_MPUIO (5 + IH2_BASE) 101 #define INT_USB_HHC_1 (6 + IH2_BASE) 102 #define INT_McBSP3TX (10 + IH2_BASE) 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 #define INT_McBSP3RX (11 + IH2_BASE) 105 #define INT_McBSP1TX (12 + IH2_BASE) 106 #define INT_McBSP1RX (13 + IH2_BASE) 107 #define INT_UART2 (14 + IH2_BASE) 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 #define INT_UART1 (15 + IH2_BASE) 110 #define INT_BT_MCSI1TX (16 + IH2_BASE) 111 #define INT_BT_MCSI1RX (17 + IH2_BASE) 112 #define INT_USB_W2FC (20 + IH2_BASE) 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 #define INT_1WIRE (21 + IH2_BASE) 115 #define INT_OS_TIMER (22 + IH2_BASE) 116 #define INT_MMC (23 + IH2_BASE) 117 #define INT_GAUGE_32K (24 + IH2_BASE) 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 #define INT_RTC_TIMER (25 + IH2_BASE) 120 #define INT_RTC_ALARM (26 + IH2_BASE) 121 #define INT_MEM_STICK (27 + IH2_BASE) 122 #define INT_DSP_MMU (28 + IH2_BASE) 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 #define INT_1510_COM_SPI_RO (31 + IH2_BASE) 125 #define INT_1610_FAC (0 + IH2_BASE) 126 #define INT_1610_USB_HHC_2 (7 + IH2_BASE) 127 #define INT_1610_USB_OTG (8 + IH2_BASE) 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 #define INT_1610_SoSSI (9 + IH2_BASE) 130 #define INT_1610_SoSSI_MATCH (19 + IH2_BASE) 131 #define INT_1610_McBSP2RX_OF (31 + IH2_BASE) 132 #define INT_1610_STI (32 + IH2_BASE) 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 #define INT_1610_STI_WAKEUP (33 + IH2_BASE) 135 #define INT_1610_GPTIMER3 (34 + IH2_BASE) 136 #define INT_1610_GPTIMER4 (35 + IH2_BASE) 137 #define INT_1610_GPTIMER5 (36 + IH2_BASE) 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 #define INT_1610_GPTIMER6 (37 + IH2_BASE) 140 #define INT_1610_GPTIMER7 (38 + IH2_BASE) 141 #define INT_1610_GPTIMER8 (39 + IH2_BASE) 142 #define INT_1610_GPIO_BANK2 (40 + IH2_BASE) 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 #define INT_1610_GPIO_BANK3 (41 + IH2_BASE) 145 #define INT_1610_MMC2 (42 + IH2_BASE) 146 #define INT_1610_CF (43 + IH2_BASE) 147 #define INT_1610_WAKE_UP_REQ (46 + IH2_BASE) 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 #define INT_1610_GPIO_BANK4 (48 + IH2_BASE) 150 #define INT_1610_SPI (49 + IH2_BASE) 151 #define INT_1610_DMA_CH6 (53 + IH2_BASE) 152 #define INT_1610_DMA_CH7 (54 + IH2_BASE) 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 #define INT_1610_DMA_CH8 (55 + IH2_BASE) 155 #define INT_1610_DMA_CH9 (56 + IH2_BASE) 156 #define INT_1610_DMA_CH10 (57 + IH2_BASE) 157 #define INT_1610_DMA_CH11 (58 + IH2_BASE) 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define INT_1610_DMA_CH12 (59 + IH2_BASE) 160 #define INT_1610_DMA_CH13 (60 + IH2_BASE) 161 #define INT_1610_DMA_CH14 (61 + IH2_BASE) 162 #define INT_1610_DMA_CH15 (62 + IH2_BASE) 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 #define INT_1610_NAND (63 + IH2_BASE) 165 #define INT_730_HW_ERRORS (0 + IH2_BASE) 166 #define INT_730_NFIQ_PWR_FAIL (1 + IH2_BASE) 167 #define INT_730_CFCD (2 + IH2_BASE) 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 #define INT_730_CFIREQ (3 + IH2_BASE) 170 #define INT_730_I2C (4 + IH2_BASE) 171 #define INT_730_PCC (5 + IH2_BASE) 172 #define INT_730_MPU_EXT_NIRQ (6 + IH2_BASE) 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 #define INT_730_SPI_100K_1 (7 + IH2_BASE) 175 #define INT_730_SYREN_SPI (8 + IH2_BASE) 176 #define INT_730_VLYNQ (9 + IH2_BASE) 177 #define INT_730_GPIO_BANK4 (10 + IH2_BASE) 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 #define INT_730_McBSP1TX (11 + IH2_BASE) 180 #define INT_730_McBSP1RX (12 + IH2_BASE) 181 #define INT_730_McBSP1RX_OF (13 + IH2_BASE) 182 #define INT_730_UART_MODEM_IRDA_2 (14 + IH2_BASE) 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 #define INT_730_UART_MODEM_1 (15 + IH2_BASE) 185 #define INT_730_MCSI (16 + IH2_BASE) 186 #define INT_730_uWireTX (17 + IH2_BASE) 187 #define INT_730_uWireRX (18 + IH2_BASE) 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 #define INT_730_SMC_CD (19 + IH2_BASE) 190 #define INT_730_SMC_IREQ (20 + IH2_BASE) 191 #define INT_730_HDQ_1WIRE (21 + IH2_BASE) 192 #define INT_730_TIMER32K (22 + IH2_BASE) 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 #define INT_730_MMC_SDIO (23 + IH2_BASE) 195 #define INT_730_UPLD (24 + IH2_BASE) 196 #define INT_730_USB_HHC_1 (27 + IH2_BASE) 197 #define INT_730_USB_HHC_2 (28 + IH2_BASE) 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 #define INT_730_USB_GENI (29 + IH2_BASE) 200 #define INT_730_USB_OTG (30 + IH2_BASE) 201 #define INT_730_CAMERA_IF (31 + IH2_BASE) 202 #define INT_730_RNG (32 + IH2_BASE) 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 #define INT_730_DUAL_MODE_TIMER (33 + IH2_BASE) 205 #define INT_730_DBB_RF_EN (34 + IH2_BASE) 206 #define INT_730_MPUIO_KEYPAD (35 + IH2_BASE) 207 #define INT_730_SHA1_MD5 (36 + IH2_BASE) 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 #define INT_730_SPI_100K_2 (37 + IH2_BASE) 210 #define INT_730_RNG_IDLE (38 + IH2_BASE) 211 #define INT_730_MPUIO (39 + IH2_BASE) 212 #define INT_730_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 #define INT_730_LLPC_OE_FALLING (41 + IH2_BASE) 215 #define INT_730_LLPC_OE_RISING (42 + IH2_BASE) 216 #define INT_730_LLPC_VSYNC (43 + IH2_BASE) 217 #define INT_730_WAKE_UP_REQ (46 + IH2_BASE) 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 #define INT_730_DMA_CH6 (53 + IH2_BASE) 220 #define INT_730_DMA_CH7 (54 + IH2_BASE) 221 #define INT_730_DMA_CH8 (55 + IH2_BASE) 222 #define INT_730_DMA_CH9 (56 + IH2_BASE) 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 #define INT_730_DMA_CH10 (57 + IH2_BASE) 225 #define INT_730_DMA_CH11 (58 + IH2_BASE) 226 #define INT_730_DMA_CH12 (59 + IH2_BASE) 227 #define INT_730_DMA_CH13 (60 + IH2_BASE) 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 #define INT_730_DMA_CH14 (61 + IH2_BASE) 230 #define INT_730_DMA_CH15 (62 + IH2_BASE) 231 #define INT_730_NAND (63 + IH2_BASE) 232 #define INT_24XX_SYS_NIRQ 7 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 #define INT_24XX_SDMA_IRQ0 12 235 #define INT_24XX_SDMA_IRQ1 13 236 #define INT_24XX_SDMA_IRQ2 14 237 #define INT_24XX_SDMA_IRQ3 15 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 #define INT_24XX_CAM_IRQ 24 240 #define INT_24XX_DSS_IRQ 25 241 #define INT_24XX_GPIO_BANK1 29 242 #define INT_24XX_GPIO_BANK2 30 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 #define INT_24XX_GPIO_BANK3 31 245 #define INT_24XX_GPIO_BANK4 32 246 #define INT_24XX_GPTIMER1 37 247 #define INT_24XX_GPTIMER2 38 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 #define INT_24XX_GPTIMER3 39 250 #define INT_24XX_GPTIMER4 40 251 #define INT_24XX_GPTIMER5 41 252 #define INT_24XX_GPTIMER6 42 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 #define INT_24XX_GPTIMER7 43 255 #define INT_24XX_GPTIMER8 44 256 #define INT_24XX_GPTIMER9 45 257 #define INT_24XX_GPTIMER10 46 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 #define INT_24XX_GPTIMER11 47 260 #define INT_24XX_GPTIMER12 48 261 #define INT_24XX_MCBSP1_IRQ_TX 59 262 #define INT_24XX_MCBSP1_IRQ_RX 60 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 #define INT_24XX_MCBSP2_IRQ_TX 62 265 #define INT_24XX_MCBSP2_IRQ_RX 63 266 #define INT_24XX_UART1_IRQ 72 267 #define INT_24XX_UART2_IRQ 73 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 #define INT_24XX_UART3_IRQ 74 270 #define INT_24XX_MMC_IRQ 83 271 #define OMAP_MAX_GPIO_LINES 192 272 #define IH_GPIO_BASE (128 + IH2_BASE) 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) 275 #define IH_BOARD_BASE (16 + IH_MPUIO_BASE) 276 #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) 277 #ifndef __ASSEMBLY__ 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 #endif 280 #include <asm/hardware.h> 281 #ifndef NR_IRQS 282 #define NR_IRQS IH_BOARD_BASE 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 #endif 285 #endif 286
