1 ====================== 2 LLVM 3.3 Release Notes 3 ====================== 4 5 .. contents:: 6 :local: 7 8 .. warning:: 9 These are in-progress notes for the upcoming LLVM 3.3 release. You may 10 prefer the `LLVM 3.2 Release Notes <http://llvm.org/releases/3.2/docs 11 /ReleaseNotes.html>`_. 12 13 14 Introduction 15 ============ 16 17 This document contains the release notes for the LLVM Compiler Infrastructure, 18 release 3.3. Here we describe the status of LLVM, including major improvements 19 from the previous release, improvements in various subprojects of LLVM, and 20 some of the current users of the code. All LLVM releases may be downloaded 21 from the `LLVM releases web site <http://llvm.org/releases/>`_. 22 23 For more information about LLVM, including information about the latest 24 release, please check out the `main LLVM web site <http://llvm.org/>`_. If you 25 have questions or comments, the `LLVM Developer's Mailing List 26 <http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ is a good place to send 27 them. 28 29 Note that if you are reading this file from a Subversion checkout or the main 30 LLVM web page, this document applies to the *next* release, not the current 31 one. To see the release notes for a specific release, please see the `releases 32 page <http://llvm.org/releases/>`_. 33 34 Non-comprehensive list of changes in this release 35 ================================================= 36 37 .. NOTE 38 For small 1-3 sentence descriptions, just add an entry at the end of 39 this list. If your description won't fit comfortably in one bullet 40 point (e.g. maybe you would like to give an example of the 41 functionality, or simply have a lot to talk about), see the `NOTE` below 42 for adding a new subsection. 43 44 * The CellSPU port has been removed. It can still be found in older versions. 45 46 * The IR-level extended linker APIs (for example, to link bitcode files out of 47 archives) have been removed. Any existing clients of these features should 48 move to using a linker with integrated LTO support. 49 50 * LLVM and Clang's documentation has been migrated to the `Sphinx 51 <http://sphinx-doc.org/>`_ documentation generation system which uses 52 easy-to-write reStructuredText. See `llvm/docs/README.txt` for more 53 information. 54 55 * TargetTransformInfo (TTI) is a new interface that can be used by IR-level 56 passes to obtain target-specific information, such as the costs of 57 instructions. Only "Lowering" passes such as LSR and the vectorizer are 58 allowed to use the TTI infrastructure. 59 60 * We've improved the X86 and ARM cost model. 61 62 * The Attributes classes have been completely rewritten and expanded. They now 63 support not only enumerated attributes and alignments, but "string" 64 attributes, which are useful for passing information to code generation. See 65 :doc:`HowToUseAttributes` for more details. 66 67 * ... next change ... 68 69 .. NOTE 70 If you would like to document a larger change, then you can add a 71 subsection about it right here. You can copy the following boilerplate 72 and un-indent it (the indentation causes it to be inside this comment). 73 74 Special New Feature 75 ------------------- 76 77 Makes programs 10x faster by doing Special New Thing. 78 79 AArch64 target 80 -------------- 81 82 We've added support for AArch64, ARM's 64-bit architecture. Development is still 83 in fairly early stages, but we expect successful compilation when: 84 85 - compiling standard compliant C99 and C++03 with Clang; 86 - using Linux as a target platform; 87 - where code + static data doesn't exceed 4GB in size (heap allocated data has 88 no limitation). 89 90 Some additional functionality is also implemented, notably DWARF debugging, 91 GNU-style thread local storage and inline assembly. 92 93 Hexagon Target 94 -------------- 95 96 - Removed support for legacy hexagonv2 and hexagonv3 processor 97 architectures which are no longer in use. Currently supported 98 architectures are hexagonv4 and hexagonv5. 99 100 Loop Vectorizer 101 --------------- 102 103 We've continued the work on the loop vectorizer. The loop vectorizer now 104 has the following features: 105 106 - Loops with unknown trip count. 107 - Runtime checks of pointers 108 - Reductions, Inductions 109 - If Conversion 110 - Pointer induction variables 111 - Reverse iterators 112 - Vectorization of mixed types 113 - Vectorization of function calls 114 - Partial unrolling during vectorization 115 116 R600 Backend 117 ------------ 118 119 The R600 backend was added in this release, it supports AMD GPUs 120 (HD2XXX - HD7XXX). This backend is used in AMD's Open Source 121 graphics / compute drivers which are developed as part of the `Mesa3D 122 <http://www.mesa3d.org>`_ project. 123 124 125 126 Additional Information 127 ====================== 128 129 A wide variety of additional information is available on the `LLVM web page 130 <http://llvm.org/>`_, in particular in the `documentation 131 <http://llvm.org/docs/>`_ section. The web page also contains versions of the 132 API documentation which is up-to-date with the Subversion version of the source 133 code. You can access versions of these documents specific to this release by 134 going into the ``llvm/docs/`` directory in the LLVM tree. 135 136 If you have any questions or comments about LLVM, please feel free to contact 137 us via the `mailing lists <http://llvm.org/docs/#maillist>`_. 138 139
