1 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s | FileCheck -check-prefix=DISABLED %s 2 ; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=ENABLED %s 3 4 ; CHECK-ENABLED: t1: 5 ; CHECK-DISABLED: t1: 6 define <2 x float> @t1(float %f) { 7 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 8 ; CHECK-DISABLED: vmov.32 d0[1], r{{.}} 9 %i1 = insertelement <2 x float> undef, float %f, i32 1 10 %i2 = fadd <2 x float> %i1, %i1 11 ret <2 x float> %i2 12 } 13 14 ; CHECK-ENABLED: t2: 15 ; CHECK-DISABLED: t2: 16 define <4 x float> @t2(float %g, float %f) { 17 ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0] 18 ; CHECK-DISABLED: vmov.32 d0[1], r{{.}} 19 %i1 = insertelement <4 x float> undef, float %f, i32 1 20 %i2 = fadd <4 x float> %i1, %i1 21 ret <4 x float> %i2 22 } 23 24 ; CHECK-ENABLED: t3: 25 ; CHECK-DISABLED: t3: 26 define arm_aapcs_vfpcc <2 x float> @t3(float %f) { 27 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 28 %i1 = insertelement <2 x float> undef, float %f, i32 1 29 %i2 = fadd <2 x float> %i1, %i1 30 ret <2 x float> %i2 31 } 32 33 ; CHECK-ENABLED: t4: 34 ; CHECK-DISABLED: t4: 35 define <2 x float> @t4(float %f) { 36 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 37 ; CHECK-DISABLED-NOT: vdup 38 %i1 = insertelement <2 x float> undef, float %f, i32 1 39 br label %b 40 41 ; Block %b has an S-reg as live-in. 42 b: 43 %i2 = fadd <2 x float> %i1, %i1 44 ret <2 x float> %i2 45 } 46 47 ; CHECK-ENABLED: t5: 48 ; CHECK-DISABLED: t5: 49 define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) { 50 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0] 51 ; CHECK-ENABLED: vadd.f32 52 ; CHECK-ENABLED-NEXT: bx lr 53 ; CHECK-DISABLED-NOT: vdup 54 %i1 = insertelement <4 x float> %q, float %f, i32 1 55 %i2 = fadd <4 x float> %i1, %i1 56 ret <4 x float> %i2 57 } 58
