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      1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s
      2 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=swift     | FileCheck %s
      3 ; Avoid some 's' 16-bit instruction which partially update CPSR (and add false
      4 ; dependency) when it isn't dependent on last CPSR defining instruction.
      5 ; rdar://8928208
      6 
      7 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone {
      8  entry:
      9 ; CHECK: t1:
     10 ; CHECK: muls [[REG:(r[0-9]+)]], r3, r2
     11 ; CHECK-NEXT: mul  [[REG2:(r[0-9]+)]], r1, r0
     12 ; CHECK-NEXT: muls r0, [[REG]], [[REG2]]
     13   %0 = mul nsw i32 %a, %b
     14   %1 = mul nsw i32 %c, %d
     15   %2 = mul nsw i32 %0, %1
     16   ret i32 %2
     17 }
     18 
     19 ; Avoid partial CPSR dependency via loop backedge.
     20 ; rdar://10357570
     21 define void @t2(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind {
     22 entry:
     23 ; CHECK: t2:
     24   %tobool7 = icmp eq i32* %ptr2, null
     25   br i1 %tobool7, label %while.end, label %while.body
     26 
     27 while.body:
     28 ; CHECK: while.body
     29 ; CHECK: mul r{{[0-9]+}}
     30 ; CHECK-NOT: muls
     31   %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ]
     32   %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ]
     33   %0 = load i32* %ptr1.addr.09, align 4
     34   %arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1
     35   %1 = load i32* %arrayidx1, align 4
     36   %arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2
     37   %2 = load i32* %arrayidx3, align 4
     38   %arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3
     39   %3 = load i32* %arrayidx4, align 4
     40   %add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4
     41   %mul = mul i32 %1, %0
     42   %mul5 = mul i32 %mul, %2
     43   %mul6 = mul i32 %mul5, %3
     44   store i32 %mul6, i32* %ptr2.addr.08, align 4
     45   %incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1
     46   %tobool = icmp eq i32* %incdec.ptr, null
     47   br i1 %tobool, label %while.end, label %while.body
     48 
     49 while.end:
     50   ret void
     51 }
     52 
     53 ; Allow partial CPSR dependency when code size is the priority.
     54 ; rdar://12878928
     55 define void @t3(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind minsize {
     56 entry:
     57 ; CHECK: t3:
     58   %tobool7 = icmp eq i32* %ptr2, null
     59   br i1 %tobool7, label %while.end, label %while.body
     60 
     61 while.body:
     62 ; CHECK: while.body
     63 ; CHECK: mul r{{[0-9]+}}
     64 ; CHECK: muls
     65   %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ]
     66   %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ]
     67   %0 = load i32* %ptr1.addr.09, align 4
     68   %arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1
     69   %1 = load i32* %arrayidx1, align 4
     70   %arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2
     71   %2 = load i32* %arrayidx3, align 4
     72   %arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3
     73   %3 = load i32* %arrayidx4, align 4
     74   %add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4
     75   %mul = mul i32 %1, %0
     76   %mul5 = mul i32 %mul, %2
     77   %mul6 = mul i32 %mul5, %3
     78   store i32 %mul6, i32* %ptr2.addr.08, align 4
     79   %incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1
     80   %tobool = icmp eq i32* %incdec.ptr, null
     81   br i1 %tobool, label %while.end, label %while.body
     82 
     83 while.end:
     84   ret void
     85 }
     86