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      1 ; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=O32
      2 ; RUN: llc -march=mips -regalloc=basic < %s | FileCheck %s -check-prefix=O32
      3 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck %s -check-prefix=N64
      4 
      5 @i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
      6 @i3 = common global i32* null, align 4
      7 
      8 ; O32:  lw $[[R0:[0-9]+]], %got(i3)
      9 ; O32:  addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1) 
     10 ; O32:  movn $[[R0]], $[[R1]], ${{[0-9]+}} 
     11 ; N64:  ldr $[[R0:[0-9]+]] 
     12 ; N64:  ld $[[R1:[0-9]+]], %got_disp(i1)
     13 ; N64:  movn $[[R0]], $[[R1]], ${{[0-9]+}} 
     14 define i32* @cmov1(i32 %s) nounwind readonly {
     15 entry:
     16   %tobool = icmp ne i32 %s, 0
     17   %tmp1 = load i32** @i3, align 4
     18   %cond = select i1 %tobool, i32* getelementptr inbounds ([3 x i32]* @i1, i32 0, i32 0), i32* %tmp1
     19   ret i32* %cond
     20 }
     21 
     22 @c = global i32 1, align 4
     23 @d = global i32 0, align 4
     24 
     25 ; O32: cmov2:
     26 ; O32: addiu $[[R1:[0-9]+]], ${{[a-z0-9]+}}, %got(d)
     27 ; O32: addiu $[[R0:[0-9]+]], ${{[a-z0-9]+}}, %got(c)
     28 ; O32: movn  $[[R1]], $[[R0]], ${{[0-9]+}}
     29 ; N64: cmov2:
     30 ; N64: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(d)
     31 ; N64: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got_disp(c)
     32 ; N64: movn  $[[R1]], $[[R0]], ${{[0-9]+}}
     33 define i32 @cmov2(i32 %s) nounwind readonly {
     34 entry:
     35   %tobool = icmp ne i32 %s, 0
     36   %tmp1 = load i32* @c, align 4
     37   %tmp2 = load i32* @d, align 4
     38   %cond = select i1 %tobool, i32 %tmp1, i32 %tmp2
     39   ret i32 %cond
     40 }
     41 
     42 ; O32: cmov3:
     43 ; O32: xori $[[R0:[0-9]+]], ${{[0-9]+}}, 234
     44 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
     45 define i32 @cmov3(i32 %a, i32 %b, i32 %c) nounwind readnone {
     46 entry:
     47   %cmp = icmp eq i32 %a, 234
     48   %cond = select i1 %cmp, i32 %b, i32 %c
     49   ret i32 %cond
     50 }
     51 
     52 ; N64: cmov4:
     53 ; N64: xori $[[R0:[0-9]+]], ${{[0-9]+}}, 234
     54 ; N64: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
     55 define i64 @cmov4(i32 %a, i64 %b, i64 %c) nounwind readnone {
     56 entry:
     57   %cmp = icmp eq i32 %a, 234
     58   %cond = select i1 %cmp, i64 %b, i64 %c
     59   ret i64 %cond
     60 }
     61 
     62 ; slti and conditional move.
     63 ;
     64 ; Check that, pattern
     65 ;  (select (setgt a, N), t, f)
     66 ; turns into
     67 ;  (movz t, (setlt a, N + 1), f)
     68 ; if N + 1 fits in 16-bit.
     69 
     70 ; O32: slti0:
     71 ; O32: slti $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
     72 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
     73 
     74 define i32 @slti0(i32 %a) {
     75 entry:
     76   %cmp = icmp sgt i32 %a, 32766
     77   %cond = select i1 %cmp, i32 3, i32 4
     78   ret i32 %cond
     79 }
     80 
     81 ; O32: slti1:
     82 ; O32: slt ${{[0-9]+}}
     83 
     84 define i32 @slti1(i32 %a) {
     85 entry:
     86   %cmp = icmp sgt i32 %a, 32767
     87   %cond = select i1 %cmp, i32 3, i32 4
     88   ret i32 %cond
     89 }
     90 
     91 ; O32: slti2:
     92 ; O32: slti $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
     93 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
     94 
     95 define i32 @slti2(i32 %a) {
     96 entry:
     97   %cmp = icmp sgt i32 %a, -32769
     98   %cond = select i1 %cmp, i32 3, i32 4
     99   ret i32 %cond
    100 }
    101 
    102 ; O32: slti3:
    103 ; O32: slt ${{[0-9]+}}
    104 
    105 define i32 @slti3(i32 %a) {
    106 entry:
    107   %cmp = icmp sgt i32 %a, -32770
    108   %cond = select i1 %cmp, i32 3, i32 4
    109   ret i32 %cond
    110 }
    111 
    112 ; 64-bit patterns.
    113 
    114 ; N64: slti64_0:
    115 ; N64: slti $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
    116 ; N64: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
    117 
    118 define i64 @slti64_0(i64 %a) {
    119 entry:
    120   %cmp = icmp sgt i64 %a, 32766
    121   %conv = select i1 %cmp, i64 3, i64 4
    122   ret i64 %conv
    123 }
    124 
    125 ; N64: slti64_1:
    126 ; N64: slt ${{[0-9]+}}
    127 
    128 define i64 @slti64_1(i64 %a) {
    129 entry:
    130   %cmp = icmp sgt i64 %a, 32767
    131   %conv = select i1 %cmp, i64 3, i64 4
    132   ret i64 %conv
    133 }
    134 
    135 ; N64: slti64_2:
    136 ; N64: slti $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
    137 ; N64: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
    138 
    139 define i64 @slti64_2(i64 %a) {
    140 entry:
    141   %cmp = icmp sgt i64 %a, -32769
    142   %conv = select i1 %cmp, i64 3, i64 4
    143   ret i64 %conv
    144 }
    145 
    146 ; N64: slti64_3:
    147 ; N64: slt ${{[0-9]+}}
    148 
    149 define i64 @slti64_3(i64 %a) {
    150 entry:
    151   %cmp = icmp sgt i64 %a, -32770
    152   %conv = select i1 %cmp, i64 3, i64 4
    153   ret i64 %conv
    154 }
    155 
    156 ; sltiu instructions.
    157 
    158 ; O32: sltiu0:
    159 ; O32: sltiu $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
    160 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
    161 
    162 define i32 @sltiu0(i32 %a) {
    163 entry:
    164   %cmp = icmp ugt i32 %a, 32766
    165   %cond = select i1 %cmp, i32 3, i32 4
    166   ret i32 %cond
    167 }
    168 
    169 ; O32: sltiu1:
    170 ; O32: sltu ${{[0-9]+}}
    171 
    172 define i32 @sltiu1(i32 %a) {
    173 entry:
    174   %cmp = icmp ugt i32 %a, 32767
    175   %cond = select i1 %cmp, i32 3, i32 4
    176   ret i32 %cond
    177 }
    178 
    179 ; O32: sltiu2:
    180 ; O32: sltiu $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
    181 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
    182 
    183 define i32 @sltiu2(i32 %a) {
    184 entry:
    185   %cmp = icmp ugt i32 %a, -32769
    186   %cond = select i1 %cmp, i32 3, i32 4
    187   ret i32 %cond
    188 }
    189 
    190 ; O32: sltiu3:
    191 ; O32: sltu ${{[0-9]+}}
    192 
    193 define i32 @sltiu3(i32 %a) {
    194 entry:
    195   %cmp = icmp ugt i32 %a, -32770
    196   %cond = select i1 %cmp, i32 3, i32 4
    197   ret i32 %cond
    198 }
    199