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      1 //===- X86DisassemblerTables.h - Disassembler tables ------------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file is part of the X86 Disassembler Emitter.
     11 // It contains the interface of the disassembler tables.
     12 // Documentation for the disassembler emitter in general can be found in
     13 //  X86DisasemblerEmitter.h.
     14 //
     15 //===----------------------------------------------------------------------===//
     16 
     17 #ifndef X86DISASSEMBLERTABLES_H
     18 #define X86DISASSEMBLERTABLES_H
     19 
     20 #include "X86DisassemblerShared.h"
     21 #include "X86ModRMFilters.h"
     22 #include "llvm/Support/raw_ostream.h"
     23 #include <vector>
     24 
     25 namespace llvm {
     26 
     27 namespace X86Disassembler {
     28 
     29 /// DisassemblerTables - Encapsulates all the decode tables being generated by
     30 ///   the table emitter.  Contains functions to populate the tables as well as
     31 ///   to emit them as hierarchical C structures suitable for consumption by the
     32 ///   runtime.
     33 class DisassemblerTables {
     34 private:
     35   /// The decoder tables.  There is one for each opcode type:
     36   /// [0] one-byte opcodes
     37   /// [1] two-byte opcodes of the form 0f __
     38   /// [2] three-byte opcodes of the form 0f 38 __
     39   /// [3] three-byte opcodes of the form 0f 3a __
     40   /// [4] three-byte opcodes of the form 0f a6 __
     41   /// [5] three-byte opcodes of the form 0f a7 __
     42   ContextDecision* Tables[6];
     43 
     44   /// The instruction information table
     45   std::vector<InstructionSpecifier> InstructionSpecifiers;
     46 
     47   /// True if there are primary decode conflicts in the instruction set
     48   bool HasConflicts;
     49 
     50   /// emitOneID - Emits a table entry for a single instruction entry, at the
     51   ///   innermost level of the structure hierarchy.  The entry is printed out
     52   ///   in the format "nnnn, /* MNEMONIC */" where nnnn is the ID in decimal,
     53   ///   the comma is printed if addComma is true, and the menonic is the name
     54   ///   of the instruction as listed in the LLVM tables.
     55   ///
     56   /// @param o        - The output stream to print the entry on.
     57   /// @param i        - The indentation level for o.
     58   /// @param id       - The unique ID of the instruction to print.
     59   /// @param addComma - Whether or not to print a comma after the ID.  True if
     60   ///                    additional items will follow.
     61   void emitOneID(raw_ostream &o,
     62                  uint32_t &i,
     63                  InstrUID id,
     64                  bool addComma) const;
     65 
     66   /// emitModRMDecision - Emits a table of entries corresponding to a single
     67   ///   ModR/M decision.  Compacts the ModR/M decision if possible.  ModR/M
     68   ///   decisions are printed as:
     69   ///
     70   ///   { /* struct ModRMDecision */
     71   ///     TYPE,
     72   ///     modRMTablennnn
     73   ///   }
     74   ///
     75   ///   where nnnn is a unique ID for the corresponding table of IDs.
     76   ///   TYPE indicates whether the table has one entry that is the same
     77   ///   regardless of ModR/M byte, two entries - one for bytes 0x00-0xbf and one
     78   ///   for bytes 0xc0-0xff -, or 256 entries, one for each possible byte.
     79   ///   nnnn is the number of a table for looking up these values.  The tables
     80   ///   are written separately so that tables consisting entirely of zeros will
     81   ///   not be duplicated.  (These all have the name modRMEmptyTable.)  A table
     82   ///   is printed as:
     83   ///
     84   ///   InstrUID modRMTablennnn[k] = {
     85   ///     nnnn, /* MNEMONIC */
     86   ///     ...
     87   ///     nnnn /* MNEMONIC */
     88   ///   };
     89   ///
     90   /// @param o1       - The output stream to print the ID table to.
     91   /// @param o2       - The output stream to print the decision structure to.
     92   /// @param i1       - The indentation level to use with stream o1.
     93   /// @param i2       - The indentation level to use with stream o2.
     94   /// @param decision - The ModR/M decision to emit.  This decision has 256
     95   ///                   entries - emitModRMDecision decides how to compact it.
     96   void emitModRMDecision(raw_ostream &o1,
     97                          raw_ostream &o2,
     98                          uint32_t &i1,
     99                          uint32_t &i2,
    100                          ModRMDecision &decision) const;
    101 
    102   /// emitOpcodeDecision - Emits an OpcodeDecision and all its subsidiary ModR/M
    103   ///   decisions.  An OpcodeDecision is printed as:
    104   ///
    105   ///   { /* struct OpcodeDecision */
    106   ///     /* 0x00 */
    107   ///     { /* struct ModRMDecision */
    108   ///       ...
    109   ///     }
    110   ///     ...
    111   ///   }
    112   ///
    113   ///   where the ModRMDecision structure is printed as described in the
    114   ///   documentation for emitModRMDecision().  emitOpcodeDecision() passes on a
    115   ///   stream and indent level for the UID tables generated by
    116   ///   emitModRMDecision(), but does not use them itself.
    117   ///
    118   /// @param o1       - The output stream to print the ID tables generated by
    119   ///                   emitModRMDecision() to.
    120   /// @param o2       - The output stream for the decision structure itself.
    121   /// @param i1       - The indent level to use with stream o1.
    122   /// @param i2       - The indent level to use with stream o2.
    123   /// @param decision - The OpcodeDecision to emit along with its subsidiary
    124   ///                    structures.
    125   void emitOpcodeDecision(raw_ostream &o1,
    126                           raw_ostream &o2,
    127                           uint32_t &i1,
    128                           uint32_t &i2,
    129                           OpcodeDecision &decision) const;
    130 
    131   /// emitContextDecision - Emits a ContextDecision and all its subsidiary
    132   ///   Opcode and ModRMDecisions.  A ContextDecision is printed as:
    133   ///
    134   ///   struct ContextDecision NAME = {
    135   ///     { /* OpcodeDecisions */
    136   ///       /* IC */
    137   ///       { /* struct OpcodeDecision */
    138   ///         ...
    139   ///       },
    140   ///       ...
    141   ///     }
    142   ///   }
    143   ///
    144   ///   NAME is the name of the ContextDecision (typically one of the four names
    145   ///   ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
    146   ///   THREEBYTEA6_SYM, and THREEBYTEA7_SYM from
    147   ///   X86DisassemblerDecoderCommon.h).
    148   ///   IC is one of the contexts in InstructionContext.  There is an opcode
    149   ///   decision for each possible context.
    150   ///   The OpcodeDecision structures are printed as described in the
    151   ///   documentation for emitOpcodeDecision.
    152   ///
    153   /// @param o1       - The output stream to print the ID tables generated by
    154   ///                   emitModRMDecision() to.
    155   /// @param o2       - The output stream to print the decision structure to.
    156   /// @param i1       - The indent level to use with stream o1.
    157   /// @param i2       - The indent level to use with stream o2.
    158   /// @param decision - The ContextDecision to emit along with its subsidiary
    159   ///                   structures.
    160   /// @param name     - The name for the ContextDecision.
    161   void emitContextDecision(raw_ostream &o1,
    162                            raw_ostream &o2,
    163                            uint32_t &i1,
    164                            uint32_t &i2,
    165                            ContextDecision &decision,
    166                            const char* name) const;
    167 
    168   /// emitInstructionInfo - Prints the instruction specifier table, which has
    169   ///   one entry for each instruction, and contains name and operand
    170   ///   information.  This table is printed as:
    171   ///
    172   ///   struct InstructionSpecifier CONTEXTS_SYM[k] = {
    173   ///     {
    174   ///       /* nnnn */
    175   ///       "MNEMONIC",
    176   ///       0xnn,
    177   ///       {
    178   ///         {
    179   ///           ENCODING,
    180   ///           TYPE
    181   ///         },
    182   ///         ...
    183   ///       }
    184   ///     },
    185   ///   };
    186   ///
    187   ///   k is the total number of instructions.
    188   ///   nnnn is the ID of the current instruction (0-based).  This table
    189   ///   includes entries for non-instructions like PHINODE.
    190   ///   0xnn is the lowest possible opcode for the current instruction, used for
    191   ///   AddRegFrm instructions to compute the operand's value.
    192   ///   ENCODING and TYPE describe the encoding and type for a single operand.
    193   ///
    194   /// @param o  - The output stream to which the instruction table should be
    195   ///             written.
    196   /// @param i  - The indent level for use with the stream.
    197   void emitInstructionInfo(raw_ostream &o, uint32_t &i) const;
    198 
    199   /// emitContextTable - Prints the table that is used to translate from an
    200   ///   instruction attribute mask to an instruction context.  This table is
    201   ///   printed as:
    202   ///
    203   ///   InstructionContext CONTEXTS_STR[256] = {
    204   ///     IC, /* 0x00 */
    205   ///     ...
    206   ///   };
    207   ///
    208   ///   IC is the context corresponding to the mask 0x00, and there are 256
    209   ///   possible masks.
    210   ///
    211   /// @param o  - The output stream to which the context table should be written.
    212   /// @param i  - The indent level for use with the stream.
    213   void emitContextTable(raw_ostream &o, uint32_t &i) const;
    214 
    215   /// emitContextDecisions - Prints all four ContextDecision structures using
    216   ///   emitContextDecision().
    217   ///
    218   /// @param o1 - The output stream to print the ID tables generated by
    219   ///             emitModRMDecision() to.
    220   /// @param o2 - The output stream to print the decision structures to.
    221   /// @param i1 - The indent level to use with stream o1.
    222   /// @param i2 - The indent level to use with stream o2.
    223   void emitContextDecisions(raw_ostream &o1,
    224                             raw_ostream &o2,
    225                             uint32_t &i1,
    226                             uint32_t &i2) const;
    227 
    228   /// setTableFields - Uses a ModRMFilter to set the appropriate entries in a
    229   ///   ModRMDecision to refer to a particular instruction ID.
    230   ///
    231   /// @param decision - The ModRMDecision to populate.
    232   /// @param filter   - The filter to use in deciding which entries to populate.
    233   /// @param uid      - The unique ID to set matching entries to.
    234   /// @param opcode   - The opcode of the instruction, for error reporting.
    235   void setTableFields(ModRMDecision &decision,
    236                       const ModRMFilter &filter,
    237                       InstrUID uid,
    238                       uint8_t opcode);
    239 public:
    240   /// Constructor - Allocates space for the class decisions and clears them.
    241   DisassemblerTables();
    242 
    243   ~DisassemblerTables();
    244 
    245   /// emit - Emits the instruction table, context table, and class decisions.
    246   ///
    247   /// @param o  - The output stream to print the tables to.
    248   void emit(raw_ostream &o) const;
    249 
    250   /// setTableFields - Uses the opcode type, instruction context, opcode, and a
    251   ///   ModRMFilter as criteria to set a particular set of entries in the
    252   ///   decode tables to point to a specific uid.
    253   ///
    254   /// @param type         - The opcode type (ONEBYTE, TWOBYTE, etc.)
    255   /// @param insnContext  - The context to use (IC, IC_64BIT, etc.)
    256   /// @param opcode       - The last byte of the opcode (not counting any escape
    257   ///                       or extended opcodes).
    258   /// @param filter       - The ModRMFilter that decides which ModR/M byte values
    259   ///                       correspond to the desired instruction.
    260   /// @param uid          - The unique ID of the instruction.
    261   /// @param is32bit      - Instructon is only 32-bit
    262   /// @param ignoresVEX_L - Instruction ignores VEX.L
    263   void setTableFields(OpcodeType type,
    264                       InstructionContext insnContext,
    265                       uint8_t opcode,
    266                       const ModRMFilter &filter,
    267                       InstrUID uid,
    268                       bool is32bit,
    269                       bool ignoresVEX_L);
    270 
    271   /// specForUID - Returns the instruction specifier for a given unique
    272   ///   instruction ID.  Used when resolving collisions.
    273   ///
    274   /// @param uid  - The unique ID of the instruction.
    275   /// @return     - A reference to the instruction specifier.
    276   InstructionSpecifier& specForUID(InstrUID uid) {
    277     if (uid >= InstructionSpecifiers.size())
    278       InstructionSpecifiers.resize(uid + 1);
    279 
    280     return InstructionSpecifiers[uid];
    281   }
    282 
    283   // hasConflicts - Reports whether there were primary decode conflicts
    284   //   from any instructions added to the tables.
    285   // @return  - true if there were; false otherwise.
    286 
    287   bool hasConflicts() {
    288     return HasConflicts;
    289   }
    290 };
    291 
    292 } // namespace X86Disassembler
    293 
    294 } // namespace llvm
    295 
    296 #endif
    297