1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __MFD_TABLA_CORE_H__ 20 #define __MFD_TABLA_CORE_H__ 21 #include <linux/interrupt.h> 22 #include <linux/pm_qos.h> 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define WCD9XXX_NUM_IRQ_REGS 3 25 #define WCD9XXX_SLIM_NUM_PORT_REG 3 26 #define WCD9XXX_INTERFACE_TYPE_SLIMBUS 0x00 27 #define WCD9XXX_INTERFACE_TYPE_I2C 0x01 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define TABLA_VERSION_1_0 0 30 #define TABLA_VERSION_1_1 1 31 #define TABLA_VERSION_2_0 2 32 #define TABLA_IS_1_X(ver) (((ver == TABLA_VERSION_1_0) || (ver == TABLA_VERSION_1_1)) ? 1 : 0) 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define TABLA_IS_2_0(ver) ((ver == TABLA_VERSION_2_0) ? 1 : 0) 35 #define SITAR_VERSION_1P0 0 36 #define SITAR_VERSION_1P1 1 37 #define SITAR_IS_1P0(ver) ((ver == SITAR_VERSION_1P0) ? 1 : 0) 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define SITAR_IS_1P1(ver) ((ver == SITAR_VERSION_1P1) ? 1 : 0) 40 enum { 41 TABLA_IRQ_SLIMBUS = 0, 42 TABLA_IRQ_MBHC_REMOVAL, 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 TABLA_IRQ_MBHC_SHORT_TERM, 45 TABLA_IRQ_MBHC_PRESS, 46 TABLA_IRQ_MBHC_RELEASE, 47 TABLA_IRQ_MBHC_POTENTIAL, 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 TABLA_IRQ_MBHC_INSERTION, 50 TABLA_IRQ_BG_PRECHARGE, 51 TABLA_IRQ_PA1_STARTUP, 52 TABLA_IRQ_PA2_STARTUP, 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 TABLA_IRQ_PA3_STARTUP, 55 TABLA_IRQ_PA4_STARTUP, 56 TABLA_IRQ_PA5_STARTUP, 57 TABLA_IRQ_MICBIAS1_PRECHARGE, 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 TABLA_IRQ_MICBIAS2_PRECHARGE, 60 TABLA_IRQ_MICBIAS3_PRECHARGE, 61 TABLA_IRQ_HPH_PA_OCPL_FAULT, 62 TABLA_IRQ_HPH_PA_OCPR_FAULT, 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 TABLA_IRQ_EAR_PA_OCPL_FAULT, 65 TABLA_IRQ_HPH_L_PA_STARTUP, 66 TABLA_IRQ_HPH_R_PA_STARTUP, 67 TABLA_IRQ_EAR_PA_STARTUP, 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 TABLA_NUM_IRQS, 70 }; 71 enum { 72 SITAR_IRQ_SLIMBUS = 0, 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 SITAR_IRQ_MBHC_REMOVAL, 75 SITAR_IRQ_MBHC_SHORT_TERM, 76 SITAR_IRQ_MBHC_PRESS, 77 SITAR_IRQ_MBHC_RELEASE, 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 SITAR_IRQ_MBHC_POTENTIAL, 80 SITAR_IRQ_MBHC_INSERTION, 81 SITAR_IRQ_BG_PRECHARGE, 82 SITAR_IRQ_PA1_STARTUP, 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 SITAR_IRQ_PA2_STARTUP, 85 SITAR_IRQ_PA3_STARTUP, 86 SITAR_IRQ_PA4_STARTUP, 87 SITAR_IRQ_PA5_STARTUP, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 SITAR_IRQ_MICBIAS1_PRECHARGE, 90 SITAR_IRQ_MICBIAS2_PRECHARGE, 91 SITAR_IRQ_MICBIAS3_PRECHARGE, 92 SITAR_IRQ_HPH_PA_OCPL_FAULT, 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 SITAR_IRQ_HPH_PA_OCPR_FAULT, 95 SITAR_IRQ_EAR_PA_OCPL_FAULT, 96 SITAR_IRQ_HPH_L_PA_STARTUP, 97 SITAR_IRQ_HPH_R_PA_STARTUP, 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 SITAR_IRQ_EAR_PA_STARTUP, 100 SITAR_NUM_IRQS, 101 }; 102 enum { 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 TAIKO_IRQ_SLIMBUS = 0, 105 TAIKO_IRQ_MBHC_REMOVAL, 106 TAIKO_IRQ_MBHC_SHORT_TERM, 107 TAIKO_IRQ_MBHC_PRESS, 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 TAIKO_IRQ_MBHC_RELEASE, 110 TAIKO_IRQ_MBHC_POTENTIAL, 111 TAIKO_IRQ_MBHC_INSERTION, 112 TAIKO_IRQ_BG_PRECHARGE, 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 TAIKO_IRQ_PA1_STARTUP, 115 TAIKO_IRQ_PA2_STARTUP, 116 TAIKO_IRQ_PA3_STARTUP, 117 TAIKO_IRQ_PA4_STARTUP, 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 TAIKO_IRQ_PA5_STARTUP, 120 TAIKO_IRQ_MICBIAS1_PRECHARGE, 121 TAIKO_IRQ_MICBIAS2_PRECHARGE, 122 TAIKO_IRQ_MICBIAS3_PRECHARGE, 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 TAIKO_IRQ_HPH_PA_OCPL_FAULT, 125 TAIKO_IRQ_HPH_PA_OCPR_FAULT, 126 TAIKO_IRQ_EAR_PA_OCPL_FAULT, 127 TAIKO_IRQ_HPH_L_PA_STARTUP, 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 TAIKO_IRQ_HPH_R_PA_STARTUP, 130 TAIKO_IRQ_EAR_PA_STARTUP, 131 TAIKO_NUM_IRQS, 132 }; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 enum wcd9xxx_pm_state { 135 WCD9XXX_PM_SLEEPABLE, 136 WCD9XXX_PM_AWAKE, 137 WCD9XXX_PM_ASLEEP, 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 }; 140 struct wcd9xxx { 141 struct device *dev; 142 struct slim_device *slim; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 struct slim_device *slim_slave; 145 struct mutex io_lock; 146 struct mutex xfer_lock; 147 struct mutex irq_lock; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 u8 version; 150 unsigned int irq_base; 151 unsigned int irq; 152 u8 irq_masks_cur[WCD9XXX_NUM_IRQ_REGS]; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 u8 irq_masks_cache[WCD9XXX_NUM_IRQ_REGS]; 155 u8 irq_level[WCD9XXX_NUM_IRQ_REGS]; 156 int reset_gpio; 157 int (*read_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg, 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 int bytes, void *dest, bool interface_reg); 160 int (*write_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg, 161 int bytes, void *src, bool interface_reg); 162 u32 num_of_supplies; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 struct regulator_bulk_data *supplies; 165 enum wcd9xxx_pm_state pm_state; 166 struct mutex pm_lock; 167 wait_queue_head_t pm_wq; 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 struct pm_qos_request pm_qos_req; 170 int wlock_holders; 171 int num_rx_port; 172 int num_tx_port; 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 u8 idbyte[4]; 175 }; 176 enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(struct wcd9xxx *wcd9xxx, 177 enum wcd9xxx_pm_state o, 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 enum wcd9xxx_pm_state n); 180 #endif 181 182
