| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 661 /// MemIndexedMode enum - This enum defines the load / store indexed
688 enum MemIndexedMode {
[all...] |
| SelectionDAGNodes.h | 622 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
[all...] |
| SelectionDAG.h | 707 SDValue Offset, ISD::MemIndexedMode AM);
708 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
715 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
736 SDValue Offset, ISD::MemIndexedMode AM);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 147 ISD::MemIndexedMode &AM,
|
| HexagonISelDAGToDAG.cpp | 621 ISD::MemIndexedMode AM = LD->getAddressingMode();
760 ISD::MemIndexedMode AM = ST->getAddressingMode();
[all...] |
| HexagonISelLowering.cpp | 641 ISD::MemIndexedMode &AM,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 170 ISD::MemIndexedMode &AM,
|
| MSP430ISelDAGToDAG.cpp | 303 ISD::MemIndexedMode AM = LD->getAddressingMode();
|
| MSP430ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 323 ISD::MemIndexedMode &AM,
331 ISD::MemIndexedMode &AM,
|
| ARMISelDAGToDAG.cpp | 811 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
847 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
867 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 342 ISD::MemIndexedMode &AM,
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 320 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
|
| SelectionDAG.cpp | 511 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
