/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 703 /// ZEXTLOAD loads the integer operand and zero extends it to a larger 711 ZEXTLOAD, [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | 246 Extension = ISD::ZEXTLOAD;
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AArch64ISelLowering.cpp | 77 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 81 setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Custom); 82 setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i8, Custom); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | 732 ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD [all...] |
SelectionDAGDumper.cpp | 454 case ISD::ZEXTLOAD: OS << ", zext"; break;
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LegalizeDAG.cpp | 526 // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD. 528 HiExtType = ISD::ZEXTLOAD; 533 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(), 548 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, [all...] |
LegalizeVectorOps.cpp | 478 case ISD::ZEXTLOAD:
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LegalizeIntegerTypes.cpp | [all...] |
TargetLowering.cpp | [all...] |
SelectionDAG.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 131 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); 135 setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Expand); 461 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | 535 bool zextval = (LD->getExtensionType() == ISD::ZEXTLOAD); 563 LD->getExtensionType() == ISD::ZEXTLOAD) { [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 94 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 212 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); 374 setLoadExtAction(ISD::ZEXTLOAD, MVT::i32, Custom); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 88 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); [all...] |
/external/llvm/lib/Transforms/Scalar/ |
CodeGenPrepare.cpp | [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 164 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 393 setLoadExtAction(ISD::ZEXTLOAD, VT, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 450 setLoadExtAction(ISD::ZEXTLOAD, (MVT::SimpleValueType)VT, Expand); 605 setLoadExtAction(ISD::ZEXTLOAD, Tys[i], Legal); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |