| /external/clang/test/CodeGen/ |
| builtins-mips.c | 34 // CHECK: call <4 x i8> @llvm.mips.subu.qb
36 // CHECK: call <4 x i8> @llvm.mips.subu.s.qb
520 // CHECK: call <2 x i16> @llvm.mips.subu.ph
524 // CHECK: call <2 x i16> @llvm.mips.subu.s.ph
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 171 #define PTR_SUBU subu
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 171 #define PTR_SUBU subu
|
| /external/llvm/test/CodeGen/Mips/ |
| dsp-r2.ll | 155 ; CHECK: subu.ph
159 %2 = tail call <2 x i16> @llvm.mips.subu.ph(<2 x i16> %0, <2 x i16> %1)
165 declare <2 x i16> @llvm.mips.subu.ph(<2 x i16>, <2 x i16>) nounwind
173 %2 = tail call <2 x i16> @llvm.mips.subu.s.ph(<2 x i16> %0, <2 x i16> %1)
179 declare <2 x i16> @llvm.mips.subu.s.ph(<2 x i16>, <2 x i16>) nounwind
|
| dsp-r1.ll | 467 ; CHECK: subu.qb
471 %2 = tail call <4 x i8> @llvm.mips.subu.qb(<4 x i8> %0, <4 x i8> %1)
477 declare <4 x i8> @llvm.mips.subu.qb(<4 x i8>, <4 x i8>) nounwind
485 %2 = tail call <4 x i8> @llvm.mips.subu.s.qb(<4 x i8> %0, <4 x i8> %1)
491 declare <4 x i8> @llvm.mips.subu.s.qb(<4 x i8>, <4 x i8>) nounwind
[all...] |
| atomic.ll | 121 ; CHECK: subu $[[R11:[0-9]+]], $[[R10]], $[[R9]]
|
| /external/valgrind/main/include/ |
| valgrind.h | [all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 453 mMips->SUBU(Rd, Rn, src);
491 mMips->SUBU(Rd, src, Rn); // subu with the parameters reversed
916 mMips->SUBU(R_at, Rn, abs(amode.reg));
958 mMips->SUBU(R_at, Rn, abs(amode.reg));
[all...] |
| /development/ndk/platforms/android-9/arch-mips/src/ |
| crtbegin_static.S | 65 subu $sp, 32
|
| /external/v8/src/mips/ |
| constants-mips.cc | 258 case SUBU:
|
| deoptimizer-mips.cc | 778 __ Subu(sp, sp, Operand(kDoubleRegsSize));
787 __ Subu(sp, sp, kNumberOfRegisters * kPointerSize);
817 __ Subu(t0, fp, t0);
[all...] |
| lithium-codegen-mips.cc | 166 __ Subu(a0, a0, 1);
169 __ Subu(sp, sp, Operand(slots * kPointerSize));
882 __ subu(result, zero_reg, left);
888 __ subu(result, zero_reg, result);
971 __ Subu(result, zero_reg, left);
[all...] |
| macro-assembler-mips.h | 568 DEFINE_INSTRUCTION(Subu);
626 Subu(sp, sp, Operand(2 * kPointerSize));
633 Subu(sp, sp, Operand(3 * kPointerSize));
641 Subu(sp, sp, Operand(4 * kPointerSize));
651 Subu(sp, sp, Operand(kPointerSize));
[all...] |
| stub-cache-mips.cc | 244 __ Subu(scratch, scratch, at);
[all...] |
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/alsa/ |
| iatomic.h | 755 " subu %0, %2 \n"
796 " subu %0, %1, %3 \n"
799 " subu %0, %1, %3 \n"
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/alsa/ |
| iatomic.h | 755 " subu %0, %2 \n"
796 " subu %0, %1, %3 \n"
799 " subu %0, %1, %3 \n"
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/alsa/ |
| iatomic.h | 755 " subu %0, %2 \n"
796 " subu %0, %1, %3 \n"
799 " subu %0, %1, %3 \n"
|
| /dalvik/vm/mterp/out/ |
| InterpAsm-mips.S | 82 subu rd, _fpreg, sizeofStackSaveArea
272 #define CREATE_STACK(n) subu sp, sp, n
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 168 __ subu(v0, v0, t0); // 0x00001234
174 __ subu(v1, t7, t0); // 0x7ffffffc
1002 __ subu(t4, t0, t3);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.td | 816 def SUBu : ArithLogicR<"subu", CPURegsOpnd, 0, IIAlu, sub>, ADD_FM<0, 0x23>;
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 378 # CHECK: subu $4, $3, $5
|
| mips32_le.txt | 378 # CHECK: subu $4, $3, $5
|
| mips32r2.txt | 399 # CHECK: subu $4, $3, $5
|
| mips32r2_le.txt | 399 # CHECK: subu $4, $3, $5
|
| /external/qemu/target-arm/ |
| helper.h | 410 DEF_IWMMXT_HELPER_SIZE(subu)
|
