| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 84 const MachineOperand &MO = OrigMI->getOperand(i);
167 MachineOperand &MO = I.getOperand();
297 const MachineOperand &MO = MI->getOperand(i-1);
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| ScheduleDAGInstrs.cpp | 69 return U->getOperand(0);
77 (!isa<ConstantInt>(U->getOperand(1)) &&
78 Operator::getOpcode(U->getOperand(1)) != Instruction::Mul &&
79 !isa<PHINode>(U->getOperand(1))))
81 V = U->getOperand(0);
108 getUnderlyingObjectFromInt(cast<User>(V)->getOperand(0));
211 const MachineOperand &MO = ExitMI->getOperand(i);
242 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx);
286 const MachineOperand &MO = MI->getOperand(OperIdx);
366 unsigned Reg = MI->getOperand(OperIdx).getReg()
[all...] |
| LiveDebugVariables.cpp | 448 !MI->getOperand(1).isImm() || !MI->getOperand(2).isMetadata()) {
454 unsigned Offset = MI->getOperand(1).getImm();
455 const MDNode *Var = MI->getOperand(2).getMetadata();
457 UV->addDef(Idx, MI->getOperand(0));
567 if (UI.getOperand().getSubReg() || !UI->isCopy())
570 unsigned DstReg = MI->getOperand(0).getReg();
615 unsigned LocNo = getLocationNo(CopyMI->getOperand(0));
[all...] |
| MachineBasicBlock.cpp | 571 MachineOperand &MO = MI->getOperand(i);
769 if (i->getOperand(ni+1).getMBB() == this)
770 i->getOperand(ni+1).setMBB(NMBB);
817 if (I->getOperand(ni+1).getMBB() == NMBB) {
818 MachineOperand &MO = I->getOperand(ni);
[all...] |
| /external/llvm/lib/Analysis/ |
| BranchProbabilityInfo.cpp | 183 ConstantInt *Weight = dyn_cast<ConstantInt>(WeightsNode->getOperand(i));
208 Value *LHS = CI->getOperand(0);
213 assert(CI->getOperand(1)->getType()->isPointerTy());
295 Value *RHS = CI->getOperand(1);
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| TypeBasedAliasAnalysis.cpp | 93 MDNode *P = dyn_cast_or_null<MDNode>(Node->getOperand(1));
106 ConstantInt *CI = dyn_cast<ConstantInt>(Node->getOperand(2));
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| /external/llvm/lib/IR/ |
| LLVMContext.cpp | 109 if (const ConstantInt *CI = dyn_cast<ConstantInt>(SrcLoc->getOperand(0)))
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| AsmWriter.cpp | 502 CreateMetadataSlot(NMD->getOperand(i));
554 if (MDNode *N = dyn_cast_or_null<MDNode>(I->getOperand(i)))
679 if (const MDNode *Op = dyn_cast_or_null<MDNode>(N->getOperand(i)))
936 WriteAsOperandInternal(Out, CA->getOperand(0),
943 WriteAsOperandInternal(Out, CA->getOperand(i), &TypePrinter, Machine,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMMCInstLower.cpp | 119 const MachineOperand &MO = MI->getOperand(i);
|
| Thumb1FrameLowering.cpp | 60 unsigned Amount = Old->getOperand(0).getImm();
224 MI->getOperand(1).isFI() &&
225 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
231 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 48 const MachineOperand &MO = MI->getOperand(i);
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| HexagonISelLowering.cpp | 609 Base = Ptr->getOperand(0);
610 Offset = Ptr->getOperand(1);
682 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
689 cast<ConstantSDNode>(Node->getOperand(i))->getZExtValue();
706 cast<RegisterSDNode>(Node->getOperand(i))->getReg();
730 SDValue Chain = Op.getOperand(0);
731 SDValue Table = Op.getOperand(1);
732 SDValue Index = Op.getOperand(2);
767 SDValue Chain = Op.getOperand(0);
768 SDValue Size = Op.getOperand(1)
[all...] |
| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| MBlazeAsmBackend.cpp | 84 hasExprOrImm |= Inst.getOperand(i).isExpr();
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430MCInstLower.cpp | 113 const MachineOperand &MO = MI->getOperand(i);
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| /external/llvm/lib/Target/NVPTX/ |
| NVPTXAsmPrinter.cpp | 82 DiscoverDependentGlobals(U->getOperand(i), Globals);
108 DiscoverDependentGlobals(GV->getOperand(i), Others);
171 const MCExpr *Base = LowerConstant(CE->getOperand(0), AP);
187 return LowerConstant(CE->getOperand(0), AP);
193 Constant *Op = CE->getOperand(0);
203 Constant *Op = CE->getOperand(0);
232 const MCExpr *LHS = LowerConstant(CE->getOperand(0), AP);
233 const MCExpr *RHS = LowerConstant(CE->getOperand(1), AP);
552 const MachineOperand &MO = MI->getOperand(opNum);
633 if (MI->getOperand(opNum+1).isImm() &
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUAsmPrinter.cpp | 77 MachineOperand & MO = MI.getOperand(op_idx);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 75 int Size = MI.getOperand(0).getImm();
|
| /external/llvm/lib/Target/XCore/ |
| XCoreMCInstLower.cpp | 111 const MachineOperand &MO = MI->getOperand(i);
|
| /external/llvm/lib/Transforms/ObjCARC/ |
| ObjCARCAPElim.cpp | 159 Function *F = dyn_cast<Function>(cast<ConstantStruct>(Op)->getOperand(1));
|
| /external/llvm/lib/Transforms/Utils/ |
| UnifyFunctionExitNodes.cpp | 115 PN->addIncoming(BB->getTerminator()->getOperand(0), BB);
|
| /frameworks/compile/libbcc/lib/AndroidBitcode/ARM/ |
| ARMABCExpandVAArg.cpp | 44 llvm::Value *va_list_addr = pInst->getOperand(0);
|
| /frameworks/compile/libbcc/lib/AndroidBitcode/Mips/ |
| MipsABCExpandVAArg.cpp | 44 llvm::Value *va_list_addr = pInst->getOperand(0);
|
| /external/llvm/lib/Transforms/Scalar/ |
| ScalarReplAggregates.cpp | 486 if (SI->getOperand(0) == V || !SI->isSimple()) return false;
488 if (SI->getOperand(0)->getType()->isX86_MMXTy())
491 MergeInTypeForLoadOrStore(SI->getOperand(0)->getType(), Offset);
639 assert(SI->getOperand(0) != Ptr && "Consistency error!");
641 Value *New = ConvertScalar_InsertValue(SI->getOperand(0), Old, Offset,
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | [all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 529 if (MI.getOperand(i).isReg() &&
530 RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
|
