1 //===-- MBlazeInstrFormats.td - MB Instruction defs --------*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 // Format specifies the encoding used by the instruction. This is part of the 11 // ad-hoc solution used to emit machine instruction encodings by our machine 12 // code emitter. 13 class Format<bits<6> val> { 14 bits<6> Value = val; 15 } 16 17 def FPseudo : Format<0>; 18 def FRRR : Format<1>; // ADD, OR, etc. 19 def FRRI : Format<2>; // ADDI, ORI, etc. 20 def FCRR : Format<3>; // PUTD, WDC, WIC, BEQ, BNE, BGE, etc. 21 def FCRI : Format<4>; // RTID, RTED, RTSD, BEQI, BNEI, BGEI, etc. 22 def FRCR : Format<5>; // BRLD, BRALD, GETD 23 def FRCI : Format<6>; // BRLID, BRALID, MSRCLR, MSRSET 24 def FCCR : Format<7>; // BR, BRA, BRD, etc. 25 def FCCI : Format<8>; // IMM, BRI, BRAI, BRID, etc. 26 def FRRCI : Format<9>; // BSRLI, BSRAI, BSLLI 27 def FRRC : Format<10>; // SEXT8, SEXT16, SRA, SRC, SRL, FLT, FINT, FSQRT 28 def FRCX : Format<11>; // GET 29 def FRCS : Format<12>; // MFS 30 def FCRCS : Format<13>; // MTS 31 def FCRCX : Format<14>; // PUT 32 def FCX : Format<15>; // TPUT 33 def FCR : Format<16>; // TPUTD 34 def FRIR : Format<17>; // RSUBI 35 def FRRRR : Format<18>; // RSUB, FRSUB 36 def FRI : Format<19>; // RSUB, FRSUB 37 def FC : Format<20>; // NOP 38 def FRR : Format<21>; // CLZ 39 40 //===----------------------------------------------------------------------===// 41 // Describe MBlaze instructions format 42 // 43 // CPU INSTRUCTION FORMATS 44 // 45 // opcode - operation code. 46 // rd - dst reg. 47 // ra - first src. reg. 48 // rb - second src. reg. 49 // imm16 - 16-bit immediate value. 50 // 51 //===----------------------------------------------------------------------===// 52 53 // Generic MBlaze Format 54 class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, 55 list<dag> pattern, InstrItinClass itin> : Instruction { 56 let Namespace = "MBlaze"; 57 field bits<32> Inst; 58 59 bits<6> opcode = op; 60 Format Form = form; 61 bits<6> FormBits = Form.Value; 62 63 // Top 6 bits are the 'opcode' field 64 let Inst{0-5} = opcode; 65 66 // If the instruction is marked as a pseudo, set isCodeGenOnly so that the 67 // assembler and disassmbler ignore it. 68 let isCodeGenOnly = !eq(!cast<string>(form), "FPseudo"); 69 70 dag OutOperandList = outs; 71 dag InOperandList = ins; 72 73 let AsmString = asmstr; 74 let Pattern = pattern; 75 let Itinerary = itin; 76 77 // TSFlags layout should be kept in sync with MBlazeInstrInfo.h. 78 let TSFlags{5-0} = FormBits; 79 } 80 81 //===----------------------------------------------------------------------===// 82 // Pseudo instruction class 83 //===----------------------------------------------------------------------===// 84 class MBlazePseudo<dag outs, dag ins, string asmstr, list<dag> pattern>: 85 MBlazeInst<0x0, FPseudo, outs, ins, asmstr, pattern, IIC_Pseudo>; 86 87 //===----------------------------------------------------------------------===// 88 // Type A instruction class in MBlaze : <|opcode|rd|ra|rb|flags|> 89 //===----------------------------------------------------------------------===// 90 91 class TA<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr, 92 list<dag> pattern, InstrItinClass itin> : 93 MBlazeInst<op,FRRR,outs, ins, asmstr, pattern, itin> 94 { 95 bits<5> rd; 96 bits<5> ra; 97 bits<5> rb; 98 99 let Inst{6-10} = rd; 100 let Inst{11-15} = ra; 101 let Inst{16-20} = rb; 102 let Inst{21-31} = flags; 103 } 104 105 //===----------------------------------------------------------------------===// 106 // Type B instruction class in MBlaze : <|opcode|rd|ra|immediate|> 107 //===----------------------------------------------------------------------===// 108 109 class TB<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern, 110 InstrItinClass itin> : 111 MBlazeInst<op, FRRI, outs, ins, asmstr, pattern, itin> 112 { 113 bits<5> rd; 114 bits<5> ra; 115 bits<16> imm16; 116 117 let Inst{6-10} = rd; 118 let Inst{11-15} = ra; 119 let Inst{16-31} = imm16; 120 } 121 122 //===----------------------------------------------------------------------===// 123 // Type A instruction class in MBlaze but with the operands reversed 124 // in the LLVM DAG : <|opcode|rd|ra|rb|flags|> 125 //===----------------------------------------------------------------------===// 126 127 class TAR<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr, 128 list<dag> pattern, InstrItinClass itin> : 129 TA<op, flags, outs, ins, asmstr, pattern, itin> 130 { 131 bits<5> rrd; 132 bits<5> rrb; 133 bits<5> rra; 134 135 let Form = FRRRR; 136 137 let rd = rrd; 138 let ra = rra; 139 let rb = rrb; 140 } 141 142 //===----------------------------------------------------------------------===// 143 // Type B instruction class in MBlaze but with the operands reversed in 144 // the LLVM DAG : <|opcode|rd|ra|immediate|> 145 //===----------------------------------------------------------------------===// 146 class TBR<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern, 147 InstrItinClass itin> : 148 TB<op, outs, ins, asmstr, pattern, itin> { 149 bits<5> rrd; 150 bits<16> rimm16; 151 bits<5> rra; 152 153 let Form = FRIR; 154 155 let rd = rrd; 156 let ra = rra; 157 let imm16 = rimm16; 158 } 159 160 //===----------------------------------------------------------------------===// 161 // Shift immediate instruction class in MBlaze : <|opcode|rd|ra|immediate|> 162 //===----------------------------------------------------------------------===// 163 class SHT<bits<6> op, bits<2> flags, dag outs, dag ins, string asmstr, 164 list<dag> pattern, InstrItinClass itin> : 165 MBlazeInst<op, FRRI, outs, ins, asmstr, pattern, itin> { 166 bits<5> rd; 167 bits<5> ra; 168 bits<5> imm5; 169 170 let Inst{6-10} = rd; 171 let Inst{11-15} = ra; 172 let Inst{16-20} = 0x0; 173 let Inst{21-22} = flags; 174 let Inst{23-26} = 0x0; 175 let Inst{27-31} = imm5; 176 } 177 178 //===----------------------------------------------------------------------===// 179 // Special instruction class in MBlaze : <|opcode|rd|imm14|> 180 //===----------------------------------------------------------------------===// 181 class SPC<bits<6> op, bits<2> flags, dag outs, dag ins, string asmstr, 182 list<dag> pattern, InstrItinClass itin> : 183 MBlazeInst<op, FRI, outs, ins, asmstr, pattern, itin> { 184 bits<5> rd; 185 bits<14> imm14; 186 187 let Inst{6-10} = rd; 188 let Inst{11-15} = 0x0; 189 let Inst{16-17} = flags; 190 let Inst{18-31} = imm14; 191 } 192 193 //===----------------------------------------------------------------------===// 194 // MSR instruction class in MBlaze : <|opcode|rd|imm15|> 195 //===----------------------------------------------------------------------===// 196 class MSR<bits<6> op, bits<6> flags, dag outs, dag ins, string asmstr, 197 list<dag> pattern, InstrItinClass itin> : 198 MBlazeInst<op, FRI, outs, ins, asmstr, pattern, itin> { 199 bits<5> rd; 200 bits<15> imm15; 201 202 let Inst{6-10} = rd; 203 let Inst{11-16} = flags; 204 let Inst{17-31} = imm15; 205 } 206 207 //===----------------------------------------------------------------------===// 208 // TCLZ instruction class in MBlaze : <|opcode|rd|imm15|> 209 //===----------------------------------------------------------------------===// 210 class TCLZ<bits<6> op, bits<16> flags, dag outs, dag ins, string asmstr, 211 list<dag> pattern, InstrItinClass itin> : 212 MBlazeInst<op, FRR, outs, ins, asmstr, pattern, itin> { 213 bits<5> rd; 214 bits<5> ra; 215 216 let Inst{6-10} = rd; 217 let Inst{11-15} = ra; 218 let Inst{16-31} = flags; 219 } 220 221 //===----------------------------------------------------------------------===// 222 // MBAR instruction class in MBlaze : <|opcode|rd|imm15|> 223 //===----------------------------------------------------------------------===// 224 class MBAR<bits<6> op, bits<26> flags, dag outs, dag ins, string asmstr, 225 list<dag> pattern, InstrItinClass itin> : 226 MBlazeInst<op, FC, outs, ins, asmstr, pattern, itin> { 227 let Inst{6-31} = flags; 228 } 229
