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      1 #ifndef __CL_COMMON_DEFINES_H__
      2 #define __CL_COMMON_DEFINES_H__
      3 // This file includes defines that are common to both kernel code and
      4 // the NVPTX back-end.
      5 
      6 //
      7 // Common defines for Image intrinsics
      8 // Channel order
      9 enum {
     10   CLK_R = 0x10B0,
     11   CLK_A = 0x10B1,
     12   CLK_RG = 0x10B2,
     13   CLK_RA = 0x10B3,
     14   CLK_RGB = 0x10B4,
     15   CLK_RGBA = 0x10B5,
     16   CLK_BGRA = 0x10B6,
     17   CLK_ARGB = 0x10B7,
     18 
     19 #if (__NV_CL_C_VERSION == __NV_CL_C_VERSION_1_0)
     20   CLK_xRGB = 0x10B7,
     21 #endif
     22 
     23   CLK_INTENSITY = 0x10B8,
     24   CLK_LUMINANCE = 0x10B9
     25 
     26 #if (__NV_CL_C_VERSION >= __NV_CL_C_VERSION_1_1)
     27   ,
     28   CLK_Rx = 0x10BA,
     29   CLK_RGx = 0x10BB,
     30   CLK_RGBx = 0x10BC
     31 #endif
     32 };
     33 
     34 
     35 typedef enum clk_channel_type {
     36   // valid formats for float return types
     37   CLK_SNORM_INT8 = 0x10D0,            // four channel RGBA unorm8
     38   CLK_SNORM_INT16 = 0x10D1,           // four channel RGBA unorm16
     39   CLK_UNORM_INT8 = 0x10D2,            // four channel RGBA unorm8
     40   CLK_UNORM_INT16 = 0x10D3,           // four channel RGBA unorm16
     41   CLK_HALF_FLOAT = 0x10DD,            // four channel RGBA half
     42   CLK_FLOAT = 0x10DE,                 // four channel RGBA float
     43 
     44 #if (__NV_CL_C_VERSION >= __NV_CL_C_VERSION_1_1)
     45   CLK_UNORM_SHORT_565 = 0x10D4,
     46   CLK_UNORM_SHORT_555 = 0x10D5,
     47   CLK_UNORM_INT_101010 = 0x10D6,
     48 #endif
     49 
     50   // valid only for integer return types
     51   CLK_SIGNED_INT8 =  0x10D7,
     52   CLK_SIGNED_INT16 = 0x10D8,
     53   CLK_SIGNED_INT32 = 0x10D9,
     54   CLK_UNSIGNED_INT8 = 0x10DA,
     55   CLK_UNSIGNED_INT16 = 0x10DB,
     56   CLK_UNSIGNED_INT32 = 0x10DC,
     57 
     58   // CI SPI for CPU
     59   __CLK_UNORM_INT8888 ,         // four channel ARGB unorm8
     60   __CLK_UNORM_INT8888R,        // four channel BGRA unorm8
     61 
     62   __CLK_VALID_IMAGE_TYPE_COUNT,
     63   __CLK_INVALID_IMAGE_TYPE = __CLK_VALID_IMAGE_TYPE_COUNT,
     64   __CLK_VALID_IMAGE_TYPE_MASK_BITS = 4,         // number of bits required to
     65                                                 // represent any image type
     66   __CLK_VALID_IMAGE_TYPE_MASK = ( 1 << __CLK_VALID_IMAGE_TYPE_MASK_BITS ) - 1
     67 }clk_channel_type;
     68 
     69 typedef enum clk_sampler_type {
     70     __CLK_ADDRESS_BASE             = 0,
     71     CLK_ADDRESS_NONE               = 0 << __CLK_ADDRESS_BASE,
     72     CLK_ADDRESS_CLAMP              = 1 << __CLK_ADDRESS_BASE,
     73     CLK_ADDRESS_CLAMP_TO_EDGE      = 2 << __CLK_ADDRESS_BASE,
     74     CLK_ADDRESS_REPEAT             = 3 << __CLK_ADDRESS_BASE,
     75     CLK_ADDRESS_MIRROR             = 4 << __CLK_ADDRESS_BASE,
     76 
     77 #if (__NV_CL_C_VERSION >= __NV_CL_C_VERSION_1_1)
     78     CLK_ADDRESS_MIRRORED_REPEAT    = CLK_ADDRESS_MIRROR,
     79 #endif
     80     __CLK_ADDRESS_MASK             = CLK_ADDRESS_NONE | CLK_ADDRESS_CLAMP |
     81                                      CLK_ADDRESS_CLAMP_TO_EDGE |
     82                                      CLK_ADDRESS_REPEAT | CLK_ADDRESS_MIRROR,
     83     __CLK_ADDRESS_BITS             = 3,        // number of bits required to
     84                                                // represent address info
     85 
     86     __CLK_NORMALIZED_BASE          = __CLK_ADDRESS_BITS,
     87     CLK_NORMALIZED_COORDS_FALSE    = 0,
     88     CLK_NORMALIZED_COORDS_TRUE     = 1 << __CLK_NORMALIZED_BASE,
     89     __CLK_NORMALIZED_MASK          = CLK_NORMALIZED_COORDS_FALSE |
     90                                      CLK_NORMALIZED_COORDS_TRUE,
     91     __CLK_NORMALIZED_BITS          = 1,        // number of bits required to
     92                                                // represent normalization
     93 
     94     __CLK_FILTER_BASE              = __CLK_NORMALIZED_BASE +
     95                                      __CLK_NORMALIZED_BITS,
     96     CLK_FILTER_NEAREST             = 0 << __CLK_FILTER_BASE,
     97     CLK_FILTER_LINEAR              = 1 << __CLK_FILTER_BASE,
     98     CLK_FILTER_ANISOTROPIC         = 2 << __CLK_FILTER_BASE,
     99     __CLK_FILTER_MASK              = CLK_FILTER_NEAREST | CLK_FILTER_LINEAR |
    100                                      CLK_FILTER_ANISOTROPIC,
    101     __CLK_FILTER_BITS              = 2,        // number of bits required to
    102                                                // represent address info
    103 
    104     __CLK_MIP_BASE                 = __CLK_FILTER_BASE + __CLK_FILTER_BITS,
    105     CLK_MIP_NEAREST                = 0 << __CLK_MIP_BASE,
    106     CLK_MIP_LINEAR                 = 1 << __CLK_MIP_BASE,
    107     CLK_MIP_ANISOTROPIC            = 2 << __CLK_MIP_BASE,
    108     __CLK_MIP_MASK                 = CLK_MIP_NEAREST | CLK_MIP_LINEAR |
    109                                      CLK_MIP_ANISOTROPIC,
    110     __CLK_MIP_BITS                 = 2,
    111 
    112     __CLK_SAMPLER_BITS             = __CLK_MIP_BASE + __CLK_MIP_BITS,
    113     __CLK_SAMPLER_MASK             = __CLK_MIP_MASK | __CLK_FILTER_MASK |
    114                                      __CLK_NORMALIZED_MASK | __CLK_ADDRESS_MASK,
    115 
    116     __CLK_ANISOTROPIC_RATIO_BITS   = 5,
    117     __CLK_ANISOTROPIC_RATIO_MASK   = (int) 0x80000000 >>
    118                                       (__CLK_ANISOTROPIC_RATIO_BITS-1)
    119 } clk_sampler_type;
    120 
    121 // Memory synchronization
    122 #define CLK_LOCAL_MEM_FENCE     (1 << 0)
    123 #define CLK_GLOBAL_MEM_FENCE    (1 << 1)
    124 
    125 #endif // __CL_COMMON_DEFINES_H__
    126